2012-03-15 06:24:07 +01:00
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/** @file
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2014-07-09 05:51:56 +02:00
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x64 CPU Exception Handler.
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2012-03-15 06:24:07 +01:00
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2017-04-01 08:16:41 +02:00
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Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.<BR>
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2012-03-15 06:24:07 +01:00
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "CpuExceptionCommon.h"
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/**
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2013-11-22 07:24:41 +01:00
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Return address map of exception handler template so that C code can generate
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exception tables.
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2012-03-15 06:24:07 +01:00
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2013-11-22 07:24:41 +01:00
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@param IdtEntry Pointer to IDT entry to be updated.
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@param InterruptHandler IDT handler value.
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2012-03-15 06:24:07 +01:00
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**/
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VOID
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2013-11-22 07:24:41 +01:00
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ArchUpdateIdtEntry (
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IN IA32_IDT_GATE_DESCRIPTOR *IdtEntry,
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IN UINTN InterruptHandler
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2012-03-15 06:24:07 +01:00
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)
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{
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2013-11-22 07:24:41 +01:00
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IdtEntry->Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler;
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IdtEntry->Bits.OffsetHigh = (UINT16)((UINTN)InterruptHandler >> 16);
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2017-04-07 04:00:59 +02:00
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IdtEntry->Bits.OffsetUpper = (UINT32)((UINTN)InterruptHandler >> 32);
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2013-11-22 07:24:41 +01:00
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IdtEntry->Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
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}
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/**
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Read IDT handler value from IDT entry.
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@param IdtEntry Pointer to IDT entry to be read.
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**/
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UINTN
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ArchGetIdtHandler (
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IN IA32_IDT_GATE_DESCRIPTOR *IdtEntry
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)
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{
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return IdtEntry->Bits.OffsetLow + (((UINTN) IdtEntry->Bits.OffsetHigh) << 16) +
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(((UINTN) IdtEntry->Bits.OffsetUpper) << 32);
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}
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2012-03-15 06:24:07 +01:00
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2013-11-22 07:24:41 +01:00
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/**
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Save CPU exception context when handling EFI_VECTOR_HANDOFF_HOOK_AFTER case.
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2016-11-30 08:04:32 +01:00
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@param[in] ExceptionType Exception type.
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@param[in] SystemContext Pointer to EFI_SYSTEM_CONTEXT.
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@param[in] ExceptionHandlerData Pointer to exception handler data.
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2013-11-22 07:24:41 +01:00
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**/
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VOID
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ArchSaveExceptionContext (
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2016-11-30 08:04:32 +01:00
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IN UINTN ExceptionType,
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IN EFI_SYSTEM_CONTEXT SystemContext,
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IN EXCEPTION_HANDLER_DATA *ExceptionHandlerData
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2013-11-22 07:24:41 +01:00
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)
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{
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IA32_EFLAGS32 Eflags;
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2016-11-30 08:04:32 +01:00
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RESERVED_VECTORS_DATA *ReservedVectors;
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ReservedVectors = ExceptionHandlerData->ReservedVectors;
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2012-03-15 06:24:07 +01:00
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//
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2013-11-22 07:24:41 +01:00
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// Save Exception context in global variable
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2012-03-15 06:24:07 +01:00
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//
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2016-11-30 08:04:32 +01:00
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ReservedVectors[ExceptionType].OldSs = SystemContext.SystemContextX64->Ss;
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ReservedVectors[ExceptionType].OldSp = SystemContext.SystemContextX64->Rsp;
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ReservedVectors[ExceptionType].OldFlags = SystemContext.SystemContextX64->Rflags;
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ReservedVectors[ExceptionType].OldCs = SystemContext.SystemContextX64->Cs;
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ReservedVectors[ExceptionType].OldIp = SystemContext.SystemContextX64->Rip;
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ReservedVectors[ExceptionType].ExceptionData = SystemContext.SystemContextX64->ExceptionData;
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2012-03-15 06:24:07 +01:00
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//
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2013-11-22 07:24:41 +01:00
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// Clear IF flag to avoid old IDT handler enable interrupt by IRET
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2012-03-15 06:24:07 +01:00
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//
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2013-11-22 07:24:41 +01:00
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Eflags.UintN = SystemContext.SystemContextX64->Rflags;
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2017-04-07 04:00:59 +02:00
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Eflags.Bits.IF = 0;
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2013-11-22 07:24:41 +01:00
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SystemContext.SystemContextX64->Rflags = Eflags.UintN;
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//
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// Modify the EIP in stack, then old IDT handler will return to the stub code
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//
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2016-11-30 08:04:32 +01:00
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SystemContext.SystemContextX64->Rip = (UINTN) ReservedVectors[ExceptionType].HookAfterStubHeaderCode;
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2012-03-15 06:24:07 +01:00
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}
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/**
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2013-11-22 07:24:41 +01:00
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Restore CPU exception context when handling EFI_VECTOR_HANDOFF_HOOK_AFTER case.
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2012-03-15 06:24:07 +01:00
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2016-11-30 08:11:02 +01:00
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@param[in] ExceptionType Exception type.
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@param[in] SystemContext Pointer to EFI_SYSTEM_CONTEXT.
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@param[in] ExceptionHandlerData Pointer to exception handler data.
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2012-03-15 06:24:07 +01:00
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**/
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VOID
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2013-11-22 07:24:41 +01:00
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ArchRestoreExceptionContext (
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2016-11-30 08:11:02 +01:00
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IN UINTN ExceptionType,
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IN EFI_SYSTEM_CONTEXT SystemContext,
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IN EXCEPTION_HANDLER_DATA *ExceptionHandlerData
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2013-11-22 07:24:41 +01:00
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)
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{
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2016-11-30 08:11:02 +01:00
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RESERVED_VECTORS_DATA *ReservedVectors;
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ReservedVectors = ExceptionHandlerData->ReservedVectors;
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SystemContext.SystemContextX64->Ss = ReservedVectors[ExceptionType].OldSs;
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SystemContext.SystemContextX64->Rsp = ReservedVectors[ExceptionType].OldSp;
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SystemContext.SystemContextX64->Rflags = ReservedVectors[ExceptionType].OldFlags;
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SystemContext.SystemContextX64->Cs = ReservedVectors[ExceptionType].OldCs;
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SystemContext.SystemContextX64->Rip = ReservedVectors[ExceptionType].OldIp;
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SystemContext.SystemContextX64->ExceptionData = ReservedVectors[ExceptionType].ExceptionData;
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2013-11-22 07:24:41 +01:00
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}
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UefiCpuPkg/CpuExceptionHandlerLib: Add stack switch support
If Stack Guard is enabled and there's really a stack overflow happened during
boot, a Page Fault exception will be triggered. Because the stack is out of
usage, the exception handler, which shares the stack with normal UEFI driver,
cannot be executed and cannot dump the processor information.
Without those information, it's very difficult for the BIOS developers locate
the root cause of stack overflow. And without a workable stack, the developer
cannot event use single step to debug the UEFI driver with JTAG debugger.
In order to make sure the exception handler to execute normally after stack
overflow. We need separate stacks for exception handlers in case of unusable
stack.
IA processor allows to switch to a new stack during handling interrupt and
exception. But X64 and IA32 provides different ways to make it. X64 provides
interrupt stack table (IST) to allow maximum 7 different exceptions to have
new stack for its handler. IA32 doesn't have IST mechanism and can only use
task gate to do it since task switch allows to load a new stack through its
task-state segment (TSS).
The new API, InitializeCpuExceptionHandlersEx, is implemented to complete
extra initialization for stack switch of exception handler. Since setting
up stack switch needs allocating new memory for new stack, new GDT table
and task-state segment but the initialization method will be called in
different phases which have no consistent way to reserve those memory, this
new API is allowed to pass the reserved resources to complete the extra
works. This is cannot be done by original InitializeCpuExceptionHandlers.
Considering exception handler initialization for MP situation, this new API
is also necessary, because AP is not supposed to allocate memory. So the
memory needed for stack switch have to be reserved in BSP before waking up
AP and then pass them to InitializeCpuExceptionHandlersEx afterwards.
Since Stack Guard feature is available only for DXE phase at this time, the
new API is fully implemented for DXE only. Other phases implement a dummy
one which just calls InitializeCpuExceptionHandlers().
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wolman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Jeff Fan <vanjeff_919@hotmail.com>
Reviewed-by: Jiewen.yao@intel.com
2017-12-07 13:15:12 +01:00
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/**
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Setup separate stack for given exceptions.
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@param[in] StackSwitchData Pointer to data required for setuping up
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stack switch.
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@retval EFI_SUCCESS The exceptions have been successfully
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initialized with new stack.
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@retval EFI_INVALID_PARAMETER StackSwitchData contains invalid content.
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**/
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EFI_STATUS
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ArchSetupExcpetionStack (
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IN CPU_EXCEPTION_INIT_DATA *StackSwitchData
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)
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{
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IA32_DESCRIPTOR Gdtr;
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IA32_DESCRIPTOR Idtr;
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IA32_IDT_GATE_DESCRIPTOR *IdtTable;
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IA32_TSS_DESCRIPTOR *TssDesc;
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IA32_TASK_STATE_SEGMENT *Tss;
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UINTN StackTop;
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UINTN Index;
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UINTN Vector;
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UINTN TssBase;
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UINTN GdtSize;
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if (StackSwitchData == NULL ||
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StackSwitchData->Ia32.Revision != CPU_EXCEPTION_INIT_DATA_REV ||
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StackSwitchData->X64.KnownGoodStackTop == 0 ||
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StackSwitchData->X64.KnownGoodStackSize == 0 ||
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StackSwitchData->X64.StackSwitchExceptions == NULL ||
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StackSwitchData->X64.StackSwitchExceptionNumber == 0 ||
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StackSwitchData->X64.StackSwitchExceptionNumber > CPU_EXCEPTION_NUM ||
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StackSwitchData->X64.GdtTable == NULL ||
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StackSwitchData->X64.IdtTable == NULL ||
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StackSwitchData->X64.ExceptionTssDesc == NULL ||
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StackSwitchData->X64.ExceptionTss == NULL) {
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return EFI_INVALID_PARAMETER;
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}
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//
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// The caller is responsible for that the GDT table, no matter the existing
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// one or newly allocated, has enough space to hold descriptors for exception
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// task-state segments.
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//
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if (((UINTN)StackSwitchData->X64.GdtTable & (IA32_GDT_ALIGNMENT - 1)) != 0) {
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return EFI_INVALID_PARAMETER;
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}
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if ((UINTN)StackSwitchData->X64.ExceptionTssDesc < (UINTN)(StackSwitchData->X64.GdtTable)) {
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return EFI_INVALID_PARAMETER;
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}
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if (((UINTN)StackSwitchData->X64.ExceptionTssDesc + StackSwitchData->X64.ExceptionTssDescSize) >
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((UINTN)(StackSwitchData->X64.GdtTable) + StackSwitchData->X64.GdtTableSize)) {
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return EFI_INVALID_PARAMETER;
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}
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//
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// One task gate descriptor and one task-state segment are needed.
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//
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if (StackSwitchData->X64.ExceptionTssDescSize < sizeof (IA32_TSS_DESCRIPTOR)) {
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return EFI_INVALID_PARAMETER;
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}
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if (StackSwitchData->X64.ExceptionTssSize < sizeof (IA32_TASK_STATE_SEGMENT)) {
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return EFI_INVALID_PARAMETER;
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}
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//
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// Interrupt stack table supports only 7 vectors.
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//
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TssDesc = StackSwitchData->X64.ExceptionTssDesc;
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Tss = StackSwitchData->X64.ExceptionTss;
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2017-12-27 10:06:18 +01:00
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if (StackSwitchData->X64.StackSwitchExceptionNumber > ARRAY_SIZE (Tss->IST)) {
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UefiCpuPkg/CpuExceptionHandlerLib: Add stack switch support
If Stack Guard is enabled and there's really a stack overflow happened during
boot, a Page Fault exception will be triggered. Because the stack is out of
usage, the exception handler, which shares the stack with normal UEFI driver,
cannot be executed and cannot dump the processor information.
Without those information, it's very difficult for the BIOS developers locate
the root cause of stack overflow. And without a workable stack, the developer
cannot event use single step to debug the UEFI driver with JTAG debugger.
In order to make sure the exception handler to execute normally after stack
overflow. We need separate stacks for exception handlers in case of unusable
stack.
IA processor allows to switch to a new stack during handling interrupt and
exception. But X64 and IA32 provides different ways to make it. X64 provides
interrupt stack table (IST) to allow maximum 7 different exceptions to have
new stack for its handler. IA32 doesn't have IST mechanism and can only use
task gate to do it since task switch allows to load a new stack through its
task-state segment (TSS).
The new API, InitializeCpuExceptionHandlersEx, is implemented to complete
extra initialization for stack switch of exception handler. Since setting
up stack switch needs allocating new memory for new stack, new GDT table
and task-state segment but the initialization method will be called in
different phases which have no consistent way to reserve those memory, this
new API is allowed to pass the reserved resources to complete the extra
works. This is cannot be done by original InitializeCpuExceptionHandlers.
Considering exception handler initialization for MP situation, this new API
is also necessary, because AP is not supposed to allocate memory. So the
memory needed for stack switch have to be reserved in BSP before waking up
AP and then pass them to InitializeCpuExceptionHandlersEx afterwards.
Since Stack Guard feature is available only for DXE phase at this time, the
new API is fully implemented for DXE only. Other phases implement a dummy
one which just calls InitializeCpuExceptionHandlers().
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wolman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Jeff Fan <vanjeff_919@hotmail.com>
Reviewed-by: Jiewen.yao@intel.com
2017-12-07 13:15:12 +01:00
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return EFI_INVALID_PARAMETER;
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}
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//
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// Initialize new GDT table and/or IDT table, if any
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//
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AsmReadIdtr (&Idtr);
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AsmReadGdtr (&Gdtr);
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GdtSize = (UINTN)TssDesc + sizeof (IA32_TSS_DESCRIPTOR) -
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(UINTN)(StackSwitchData->X64.GdtTable);
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if ((UINTN)StackSwitchData->X64.GdtTable != Gdtr.Base) {
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CopyMem (StackSwitchData->X64.GdtTable, (VOID *)Gdtr.Base, Gdtr.Limit + 1);
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Gdtr.Base = (UINTN)StackSwitchData->X64.GdtTable;
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Gdtr.Limit = (UINT16)GdtSize - 1;
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}
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if ((UINTN)StackSwitchData->X64.IdtTable != Idtr.Base) {
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Idtr.Base = (UINTN)StackSwitchData->X64.IdtTable;
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}
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if (StackSwitchData->X64.IdtTableSize > 0) {
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Idtr.Limit = (UINT16)(StackSwitchData->X64.IdtTableSize - 1);
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}
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//
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// Fixup current task descriptor. Task-state segment for current task will
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// be filled by processor during task switching.
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//
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TssBase = (UINTN)Tss;
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TssDesc->Bits.LimitLow = sizeof(IA32_TASK_STATE_SEGMENT) - 1;
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TssDesc->Bits.BaseLow = (UINT16)TssBase;
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TssDesc->Bits.BaseMidl = (UINT8)(TssBase >> 16);
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TssDesc->Bits.Type = IA32_GDT_TYPE_TSS;
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2017-12-27 10:06:18 +01:00
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TssDesc->Bits.P = 1;
|
UefiCpuPkg/CpuExceptionHandlerLib: Add stack switch support
If Stack Guard is enabled and there's really a stack overflow happened during
boot, a Page Fault exception will be triggered. Because the stack is out of
usage, the exception handler, which shares the stack with normal UEFI driver,
cannot be executed and cannot dump the processor information.
Without those information, it's very difficult for the BIOS developers locate
the root cause of stack overflow. And without a workable stack, the developer
cannot event use single step to debug the UEFI driver with JTAG debugger.
In order to make sure the exception handler to execute normally after stack
overflow. We need separate stacks for exception handlers in case of unusable
stack.
IA processor allows to switch to a new stack during handling interrupt and
exception. But X64 and IA32 provides different ways to make it. X64 provides
interrupt stack table (IST) to allow maximum 7 different exceptions to have
new stack for its handler. IA32 doesn't have IST mechanism and can only use
task gate to do it since task switch allows to load a new stack through its
task-state segment (TSS).
The new API, InitializeCpuExceptionHandlersEx, is implemented to complete
extra initialization for stack switch of exception handler. Since setting
up stack switch needs allocating new memory for new stack, new GDT table
and task-state segment but the initialization method will be called in
different phases which have no consistent way to reserve those memory, this
new API is allowed to pass the reserved resources to complete the extra
works. This is cannot be done by original InitializeCpuExceptionHandlers.
Considering exception handler initialization for MP situation, this new API
is also necessary, because AP is not supposed to allocate memory. So the
memory needed for stack switch have to be reserved in BSP before waking up
AP and then pass them to InitializeCpuExceptionHandlersEx afterwards.
Since Stack Guard feature is available only for DXE phase at this time, the
new API is fully implemented for DXE only. Other phases implement a dummy
one which just calls InitializeCpuExceptionHandlers().
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wolman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Jeff Fan <vanjeff_919@hotmail.com>
Reviewed-by: Jiewen.yao@intel.com
2017-12-07 13:15:12 +01:00
|
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TssDesc->Bits.LimitHigh = 0;
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TssDesc->Bits.BaseMidh = (UINT8)(TssBase >> 24);
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TssDesc->Bits.BaseHigh = (UINT32)(TssBase >> 32);
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//
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// Fixup exception task descriptor and task-state segment
|
|
|
|
//
|
|
|
|
StackTop = StackSwitchData->X64.KnownGoodStackTop - CPU_STACK_ALIGNMENT;
|
|
|
|
StackTop = (UINTN)ALIGN_POINTER (StackTop, CPU_STACK_ALIGNMENT);
|
|
|
|
IdtTable = StackSwitchData->X64.IdtTable;
|
|
|
|
for (Index = 0; Index < StackSwitchData->X64.StackSwitchExceptionNumber; ++Index) {
|
|
|
|
//
|
|
|
|
// Fixup IST
|
|
|
|
//
|
2017-12-27 10:06:18 +01:00
|
|
|
Tss->IST[Index] = StackTop;
|
UefiCpuPkg/CpuExceptionHandlerLib: Add stack switch support
If Stack Guard is enabled and there's really a stack overflow happened during
boot, a Page Fault exception will be triggered. Because the stack is out of
usage, the exception handler, which shares the stack with normal UEFI driver,
cannot be executed and cannot dump the processor information.
Without those information, it's very difficult for the BIOS developers locate
the root cause of stack overflow. And without a workable stack, the developer
cannot event use single step to debug the UEFI driver with JTAG debugger.
In order to make sure the exception handler to execute normally after stack
overflow. We need separate stacks for exception handlers in case of unusable
stack.
IA processor allows to switch to a new stack during handling interrupt and
exception. But X64 and IA32 provides different ways to make it. X64 provides
interrupt stack table (IST) to allow maximum 7 different exceptions to have
new stack for its handler. IA32 doesn't have IST mechanism and can only use
task gate to do it since task switch allows to load a new stack through its
task-state segment (TSS).
The new API, InitializeCpuExceptionHandlersEx, is implemented to complete
extra initialization for stack switch of exception handler. Since setting
up stack switch needs allocating new memory for new stack, new GDT table
and task-state segment but the initialization method will be called in
different phases which have no consistent way to reserve those memory, this
new API is allowed to pass the reserved resources to complete the extra
works. This is cannot be done by original InitializeCpuExceptionHandlers.
Considering exception handler initialization for MP situation, this new API
is also necessary, because AP is not supposed to allocate memory. So the
memory needed for stack switch have to be reserved in BSP before waking up
AP and then pass them to InitializeCpuExceptionHandlersEx afterwards.
Since Stack Guard feature is available only for DXE phase at this time, the
new API is fully implemented for DXE only. Other phases implement a dummy
one which just calls InitializeCpuExceptionHandlers().
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wolman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Jeff Fan <vanjeff_919@hotmail.com>
Reviewed-by: Jiewen.yao@intel.com
2017-12-07 13:15:12 +01:00
|
|
|
StackTop -= StackSwitchData->X64.KnownGoodStackSize;
|
|
|
|
|
|
|
|
//
|
|
|
|
// Set the IST field to enable corresponding IST
|
|
|
|
//
|
|
|
|
Vector = StackSwitchData->X64.StackSwitchExceptions[Index];
|
|
|
|
if (Vector >= CPU_EXCEPTION_NUM ||
|
|
|
|
Vector >= (Idtr.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR)) {
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
IdtTable[Vector].Bits.Reserved_0 = (UINT8)(Index + 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
//
|
|
|
|
// Publish GDT
|
|
|
|
//
|
|
|
|
AsmWriteGdtr (&Gdtr);
|
|
|
|
|
|
|
|
//
|
|
|
|
// Load current task
|
|
|
|
//
|
|
|
|
AsmWriteTr ((UINT16)((UINTN)StackSwitchData->X64.ExceptionTssDesc - Gdtr.Base));
|
|
|
|
|
|
|
|
//
|
|
|
|
// Publish IDT
|
|
|
|
//
|
|
|
|
AsmWriteIdtr (&Idtr);
|
|
|
|
|
|
|
|
return EFI_SUCCESS;
|
|
|
|
}
|
|
|
|
|
2013-11-22 07:24:41 +01:00
|
|
|
/**
|
2013-12-06 02:13:11 +01:00
|
|
|
Display CPU information.
|
2013-11-22 07:24:41 +01:00
|
|
|
|
|
|
|
@param ExceptionType Exception type.
|
|
|
|
@param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
|
|
|
|
**/
|
|
|
|
VOID
|
2017-04-01 08:16:41 +02:00
|
|
|
EFIAPI
|
|
|
|
DumpCpuContext (
|
2013-11-22 07:24:41 +01:00
|
|
|
IN EFI_EXCEPTION_TYPE ExceptionType,
|
2012-03-15 06:24:07 +01:00
|
|
|
IN EFI_SYSTEM_CONTEXT SystemContext
|
|
|
|
)
|
|
|
|
{
|
|
|
|
InternalPrintMessage (
|
2015-07-08 07:45:10 +02:00
|
|
|
"!!!! X64 Exception Type - %02x(%a) CPU Apic ID - %08x !!!!\n",
|
2012-03-15 06:24:07 +01:00
|
|
|
ExceptionType,
|
2015-07-08 07:45:10 +02:00
|
|
|
GetExceptionNameStr (ExceptionType),
|
2012-03-15 06:24:07 +01:00
|
|
|
GetApicId ()
|
|
|
|
);
|
2017-04-01 08:16:41 +02:00
|
|
|
if ((mErrorCodeFlag & (1 << ExceptionType)) != 0) {
|
|
|
|
InternalPrintMessage (
|
|
|
|
"ExceptionData - %016lx",
|
|
|
|
SystemContext.SystemContextX64->ExceptionData
|
|
|
|
);
|
|
|
|
if (ExceptionType == EXCEPT_IA32_PAGE_FAULT) {
|
|
|
|
InternalPrintMessage (
|
|
|
|
" I:%x R:%x U:%x W:%x P:%x PK:%x S:%x",
|
|
|
|
(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != 0,
|
|
|
|
(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_RSVD) != 0,
|
|
|
|
(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_US) != 0,
|
|
|
|
(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_WR) != 0,
|
|
|
|
(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_P) != 0,
|
|
|
|
(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_PK) != 0,
|
|
|
|
(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_SGX) != 0
|
|
|
|
);
|
|
|
|
}
|
|
|
|
InternalPrintMessage ("\n");
|
|
|
|
}
|
2012-03-15 06:24:07 +01:00
|
|
|
InternalPrintMessage (
|
|
|
|
"RIP - %016lx, CS - %016lx, RFLAGS - %016lx\n",
|
|
|
|
SystemContext.SystemContextX64->Rip,
|
|
|
|
SystemContext.SystemContextX64->Cs,
|
|
|
|
SystemContext.SystemContextX64->Rflags
|
|
|
|
);
|
|
|
|
InternalPrintMessage (
|
|
|
|
"RAX - %016lx, RCX - %016lx, RDX - %016lx\n",
|
|
|
|
SystemContext.SystemContextX64->Rax,
|
|
|
|
SystemContext.SystemContextX64->Rcx,
|
|
|
|
SystemContext.SystemContextX64->Rdx
|
|
|
|
);
|
|
|
|
InternalPrintMessage (
|
|
|
|
"RBX - %016lx, RSP - %016lx, RBP - %016lx\n",
|
|
|
|
SystemContext.SystemContextX64->Rbx,
|
|
|
|
SystemContext.SystemContextX64->Rsp,
|
|
|
|
SystemContext.SystemContextX64->Rbp
|
|
|
|
);
|
|
|
|
InternalPrintMessage (
|
|
|
|
"RSI - %016lx, RDI - %016lx\n",
|
|
|
|
SystemContext.SystemContextX64->Rsi,
|
|
|
|
SystemContext.SystemContextX64->Rdi
|
|
|
|
);
|
|
|
|
InternalPrintMessage (
|
|
|
|
"R8 - %016lx, R9 - %016lx, R10 - %016lx\n",
|
|
|
|
SystemContext.SystemContextX64->R8,
|
|
|
|
SystemContext.SystemContextX64->R9,
|
|
|
|
SystemContext.SystemContextX64->R10
|
|
|
|
);
|
|
|
|
InternalPrintMessage (
|
|
|
|
"R11 - %016lx, R12 - %016lx, R13 - %016lx\n",
|
|
|
|
SystemContext.SystemContextX64->R11,
|
|
|
|
SystemContext.SystemContextX64->R12,
|
|
|
|
SystemContext.SystemContextX64->R13
|
|
|
|
);
|
|
|
|
InternalPrintMessage (
|
|
|
|
"R14 - %016lx, R15 - %016lx\n",
|
|
|
|
SystemContext.SystemContextX64->R14,
|
|
|
|
SystemContext.SystemContextX64->R15
|
|
|
|
);
|
|
|
|
InternalPrintMessage (
|
|
|
|
"DS - %016lx, ES - %016lx, FS - %016lx\n",
|
|
|
|
SystemContext.SystemContextX64->Ds,
|
|
|
|
SystemContext.SystemContextX64->Es,
|
|
|
|
SystemContext.SystemContextX64->Fs
|
|
|
|
);
|
|
|
|
InternalPrintMessage (
|
|
|
|
"GS - %016lx, SS - %016lx\n",
|
|
|
|
SystemContext.SystemContextX64->Gs,
|
|
|
|
SystemContext.SystemContextX64->Ss
|
|
|
|
);
|
|
|
|
InternalPrintMessage (
|
|
|
|
"CR0 - %016lx, CR2 - %016lx, CR3 - %016lx\n",
|
|
|
|
SystemContext.SystemContextX64->Cr0,
|
|
|
|
SystemContext.SystemContextX64->Cr2,
|
|
|
|
SystemContext.SystemContextX64->Cr3
|
|
|
|
);
|
|
|
|
InternalPrintMessage (
|
|
|
|
"CR4 - %016lx, CR8 - %016lx\n",
|
|
|
|
SystemContext.SystemContextX64->Cr4,
|
|
|
|
SystemContext.SystemContextX64->Cr8
|
|
|
|
);
|
|
|
|
InternalPrintMessage (
|
|
|
|
"DR0 - %016lx, DR1 - %016lx, DR2 - %016lx\n",
|
|
|
|
SystemContext.SystemContextX64->Dr0,
|
|
|
|
SystemContext.SystemContextX64->Dr1,
|
|
|
|
SystemContext.SystemContextX64->Dr2
|
|
|
|
);
|
|
|
|
InternalPrintMessage (
|
|
|
|
"DR3 - %016lx, DR6 - %016lx, DR7 - %016lx\n",
|
|
|
|
SystemContext.SystemContextX64->Dr3,
|
|
|
|
SystemContext.SystemContextX64->Dr6,
|
|
|
|
SystemContext.SystemContextX64->Dr7
|
|
|
|
);
|
|
|
|
InternalPrintMessage (
|
|
|
|
"GDTR - %016lx %016lx, LDTR - %016lx\n",
|
|
|
|
SystemContext.SystemContextX64->Gdtr[0],
|
|
|
|
SystemContext.SystemContextX64->Gdtr[1],
|
|
|
|
SystemContext.SystemContextX64->Ldtr
|
|
|
|
);
|
|
|
|
InternalPrintMessage (
|
|
|
|
"IDTR - %016lx %016lx, TR - %016lx\n",
|
|
|
|
SystemContext.SystemContextX64->Idtr[0],
|
|
|
|
SystemContext.SystemContextX64->Idtr[1],
|
|
|
|
SystemContext.SystemContextX64->Tr
|
|
|
|
);
|
2017-04-07 04:00:59 +02:00
|
|
|
InternalPrintMessage (
|
2012-03-15 06:24:07 +01:00
|
|
|
"FXSAVE_STATE - %016lx\n",
|
|
|
|
&SystemContext.SystemContextX64->FxSaveState
|
|
|
|
);
|
2017-04-01 08:16:41 +02:00
|
|
|
}
|
2012-03-15 06:24:07 +01:00
|
|
|
|
2017-04-01 08:16:41 +02:00
|
|
|
/**
|
|
|
|
Display CPU information.
|
|
|
|
|
|
|
|
@param ExceptionType Exception type.
|
|
|
|
@param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
|
|
|
|
**/
|
|
|
|
VOID
|
|
|
|
DumpImageAndCpuContent (
|
|
|
|
IN EFI_EXCEPTION_TYPE ExceptionType,
|
|
|
|
IN EFI_SYSTEM_CONTEXT SystemContext
|
|
|
|
)
|
|
|
|
{
|
|
|
|
DumpCpuContext (ExceptionType, SystemContext);
|
2012-03-15 06:24:07 +01:00
|
|
|
//
|
2017-04-01 08:16:41 +02:00
|
|
|
// Dump module image base and module entry point by RIP
|
2012-03-15 06:24:07 +01:00
|
|
|
//
|
2017-12-27 10:24:04 +01:00
|
|
|
if ((ExceptionType == EXCEPT_IA32_PAGE_FAULT) &&
|
|
|
|
((SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != 0)) {
|
|
|
|
//
|
|
|
|
// The RIP in SystemContext could not be used
|
|
|
|
// if it is page fault with I/D set.
|
|
|
|
//
|
|
|
|
DumpModuleImageInfo ((*(UINTN *)(UINTN)SystemContext.SystemContextX64->Rsp));
|
|
|
|
} else {
|
|
|
|
DumpModuleImageInfo (SystemContext.SystemContextX64->Rip);
|
|
|
|
}
|
2012-03-15 06:24:07 +01:00
|
|
|
}
|