mirror of https://github.com/acidanthera/audk.git
153 lines
4.9 KiB
C
153 lines
4.9 KiB
C
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/** @file
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Header file for Industry SD Card 2.0 spec.
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Copyright (c) 2013-2015 Intel Corporation.
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef _SD_CARD_H
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#define _SD_CARD_H
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#include "MMC.h"
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#pragma pack(1)
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#define CHECK_PATTERN 0xAA ///< Physical Layer Simplified Specification Version 3.01 recommended 0xAA
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#define ACMD6 6
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#define ACMD13 13
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#define ACMD23 23
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#define ACMD41 41
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#define ACMD42 42
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#define ACMD51 51
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#define SWITCH_FUNC CMD6
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#define SEND_IF_COND CMD8
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#define SET_BUS_WIDTH ACMD6
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#define SD_STATUS ACMD13
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#define SET_WR_BLK_ERASE_COUNT ACMD23
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#define SD_SEND_OP_COND ACMD41
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#define SET_CLR_CARD_DETECT ACMD42
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#define SEND_SCR ACMD51
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#define SD_BUS_WIDTH_1 0
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#define SD_BUS_WIDTH_4 2
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#define FREQUENCY_SD_PP (25 * 1000 * 1000)
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#define FREQUENCY_SD_PP_HIGH (50 * 1000 * 1000)
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#define SD_SPEC_10 0
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#define SD_SPEC_11 1
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#define SD_SPEC_20 2
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#define VOLTAGE_27_36 0x1
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typedef struct {
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UINT8 NotUsed: 1; // 1 [0:0]
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UINT8 CRC: 7; // CRC [7:1]
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UINT8 ECC: 2; // ECC code [9:8]
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UINT8 FILE_FORMAT: 2; // File format [11:10]
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UINT8 TMP_WRITE_PROTECT: 1; // Temporary write protection [12:12]
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UINT8 PERM_WRITE_PROTECT: 1; // Permanent write protection [13:13]
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UINT8 COPY: 1; // Copy flag (OTP) [14:14]
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UINT8 FILE_FORMAT_GRP: 1; // File format group [15:15]
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UINT16 Reserved0: 5; // 0 [20:16]
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UINT16 WRITE_BL_PARTIAL: 1; // Partial blocks for write allowed [21:21]
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UINT16 WRITE_BL_LEN: 4; // Max. write data block length [25:22]
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UINT16 R2W_FACTOR: 3; // Write speed factor [28:26]
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UINT16 DEFAULT_ECC: 2; // Manufacturer default ECC [30:29]
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UINT16 WP_GRP_ENABLE: 1; // Write protect group enable [31:31]
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UINT16 WP_GRP_SIZE: 7; // Write protect group size [38:32]
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UINT16 SECTOR_SIZE: 7; // Erase sector size [45:39]
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UINT16 ERASE_BLK_EN: 1; // Erase single block enable [46:46]
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UINT16 Reserved1: 1; // 0 [47:47]
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UINT32 C_SIZE: 22; // Device size [69:48]
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UINT32 Reserved2: 6; // 0 [75:70]
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UINT32 DSR_IMP: 1; // DSR implemented [76:76]
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UINT32 READ_BLK_MISALIGN: 1; // Read block misalignment [77:77]
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UINT32 WRITE_BLK_MISALIGN: 1; // Write block misalignment [78:78]
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UINT32 READ_BL_PARTIAL: 1; // Partial blocks for read allowed [79:79]
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UINT16 READ_BL_LEN: 4; // Max. read data block length [83:80]
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UINT16 CCC: 12; // Card command classes [95:84]
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UINT8 TRAN_SPEED ; // Max. bus clock frequency [103:96]
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UINT8 NSAC ; // Data read access-time 2 in CLK cycles (NSAC*100) [111:104]
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UINT8 TAAC ; // Data read access-time 1 [119:112]
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UINT8 Reserved3: 6; // 0 [125:120]
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UINT8 CSD_STRUCTURE: 2; // CSD structure [127:126]
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}CSD_SDV2;
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typedef struct {
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UINT32 Reserved0;
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UINT32 Reserved1: 16;
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UINT32 SD_BUS_WIDTH: 4;
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UINT32 SD_SECURITY: 3;
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UINT32 DATA_STAT_AFTER_ERASE: 1;
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UINT32 SD_SPEC: 4;
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UINT32 SCR_STRUCT: 4;
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}SCR;
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typedef struct {
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UINT8 Reserved0[50];
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UINT8 ERASE_OFFSET: 2;
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UINT8 ERASE_TIMEOUT: 6;
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UINT16 ERASE_SIZE;
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UINT8 Reserved1: 4;
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UINT8 AU_SIZE: 4;
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UINT8 PERFORMANCE_MOVE;
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UINT8 SPEED_CLASS;
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UINT32 SIZE_OF_PROTECTED_AREA;
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UINT32 SD_CARD_TYPE: 16;
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UINT32 Reserved2: 13;
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UINT32 SECURED_MODE: 1;
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UINT32 DAT_BUS_WIDTH: 2;
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}SD_STATUS_REG;
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typedef struct {
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UINT8 Reserved0[34];
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UINT16 Group1BusyStatus;
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UINT16 Group2BusyStatus;
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UINT16 Group3BusyStatus;
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UINT16 Group4BusyStatus;
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UINT16 Group5BusyStatus;
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UINT16 Group6BusyStatus;
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UINT8 DataStructureVersion;
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UINT8 Group21Status;
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UINT8 Group43Status;
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UINT8 Group65Status;
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UINT16 Group1Function;
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UINT16 Group2Function;
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UINT16 Group3Function;
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UINT16 Group4Function;
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UINT16 Group5Function;
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UINT16 Group6Function;
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UINT16 MaxCurrent;
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}SWITCH_STATUS;
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#pragma pack()
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#endif
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