mirror of https://github.com/acidanthera/audk.git
214 lines
6.7 KiB
NASM
214 lines
6.7 KiB
NASM
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;------------------------------------------------------------------------------ ;
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; Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php.
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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; Module Name:
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;
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; SmiEntry.asm
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;
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; Abstract:
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;
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; Code template of the SMI handler for a particular processor
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;
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;-------------------------------------------------------------------------------
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;
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; Variables referenced by C code
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;
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EXTERNDEF SmiRendezvous:PROC
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EXTERNDEF gcSmiHandlerTemplate:BYTE
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EXTERNDEF gcSmiHandlerSize:WORD
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EXTERNDEF gSmiCr3:DWORD
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EXTERNDEF gSmiStack:DWORD
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EXTERNDEF gSmbase:DWORD
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EXTERNDEF FeaturePcdGet (PcdCpuSmmDebug):BYTE
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EXTERNDEF gSmiHandlerIdtr:FWORD
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;
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; Constants relating to PROCESSOR_SMM_DESCRIPTOR
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;
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DSC_OFFSET EQU 0fb00h
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DSC_GDTPTR EQU 30h
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DSC_GDTSIZ EQU 38h
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DSC_CS EQU 14
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DSC_DS EQU 16
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DSC_SS EQU 18
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DSC_OTHERSEG EQU 20
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;
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; Constants relating to CPU State Save Area
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;
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SSM_DR6 EQU 0ffd0h
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SSM_DR7 EQU 0ffc8h
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PROTECT_MODE_CS EQU 08h
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PROTECT_MODE_DS EQU 20h
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LONG_MODE_CS EQU 38h
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TSS_SEGMENT EQU 40h
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GDT_SIZE EQU 50h
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.code
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gcSmiHandlerTemplate LABEL BYTE
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_SmiEntryPoint:
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;
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; The encoding of BX in 16-bit addressing mode is the same as of RDI in 64-
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; bit addressing mode. And that coincidence has been used in the following
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; "64-bit like" 16-bit code. Be aware that once RDI is referenced as a
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; base address register, it is actually BX that is referenced.
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;
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DB 0bbh ; mov bx, imm16
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DW offset _GdtDesc - _SmiEntryPoint + 8000h ; bx = GdtDesc offset
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; fix GDT descriptor
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DB 2eh, 0a1h ; mov ax, cs:[offset16]
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DW DSC_OFFSET + DSC_GDTSIZ
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DB 48h ; dec ax
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DB 2eh
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mov [rdi], eax ; mov cs:[bx], ax
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DB 66h, 2eh, 0a1h ; mov eax, cs:[offset16]
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DW DSC_OFFSET + DSC_GDTPTR
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DB 2eh
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mov [rdi + 2], ax ; mov cs:[bx + 2], eax
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DB 66h, 2eh
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lgdt fword ptr [rdi] ; lgdt fword ptr cs:[bx]
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; Patch ProtectedMode Segment
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DB 0b8h ; mov ax, imm16
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DW PROTECT_MODE_CS ; set AX for segment directly
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DB 2eh
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mov [rdi - 2], eax ; mov cs:[bx - 2], ax
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; Patch ProtectedMode entry
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DB 66h, 0bfh ; mov edi, SMBASE
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gSmbase DD ?
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lea ax, [edi + (@ProtectedMode - _SmiEntryPoint) + 8000h]
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DB 2eh
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mov [rdi - 6], ax ; mov cs:[bx - 6], eax
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; Switch into @ProtectedMode
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mov rbx, cr0
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DB 66h
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and ebx, 9ffafff3h
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DB 66h
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or ebx, 00000023h
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mov cr0, rbx
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DB 66h, 0eah
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DD ?
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DW ?
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_GdtDesc FWORD ?
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@ProtectedMode:
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mov ax, PROTECT_MODE_DS
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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mov ss, ax
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DB 0bch ; mov esp, imm32
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gSmiStack DD ?
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jmp ProtFlatMode
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ProtFlatMode:
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DB 0b8h ; mov eax, offset gSmiCr3
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gSmiCr3 DD ?
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mov cr3, rax
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mov eax, 668h ; as cr4.PGE is not set here, refresh cr3
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mov cr4, rax ; in PreModifyMtrrs() to flush TLB.
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; Load TSS
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sub esp, 8 ; reserve room in stack
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sgdt fword ptr [rsp]
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mov eax, [rsp + 2] ; eax = GDT base
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add esp, 8
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mov dl, 89h
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mov [rax + TSS_SEGMENT + 5], dl ; clear busy flag
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mov eax, TSS_SEGMENT
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ltr ax
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; Switch into @LongMode
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push LONG_MODE_CS ; push cs hardcore here
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call Base ; push return address for retf later
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Base:
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add dword ptr [rsp], @LongMode - Base; offset for far retf, seg is the 1st arg
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mov ecx, 0c0000080h
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rdmsr
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or ah, 1
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wrmsr
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mov rbx, cr0
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bts ebx, 31
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mov cr0, rbx
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retf
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@LongMode: ; long mode (64-bit code) starts here
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mov rax, offset gSmiHandlerIdtr
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lidt fword ptr [rax]
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lea ebx, [rdi + DSC_OFFSET]
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mov ax, [rbx + DSC_DS]
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mov ds, eax
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mov ax, [rbx + DSC_OTHERSEG]
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mov es, eax
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mov fs, eax
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mov gs, eax
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mov ax, [rbx + DSC_SS]
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mov ss, eax
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; jmp _SmiHandler ; instruction is not needed
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_SmiHandler:
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;
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; The following lines restore DR6 & DR7 before running C code. They are useful
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; when you want to enable hardware breakpoints in SMM.
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;
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; NOTE: These lines might not be appreciated in runtime since they might
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; conflict with OS debugging facilities. Turn them off in RELEASE.
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;
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mov rax, offset FeaturePcdGet (PcdCpuSmmDebug) ;Get absolute address. Avoid RIP relative addressing
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cmp byte ptr [rax], 0
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jz @1
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DB 48h, 8bh, 0dh ; mov rcx, [rip + disp32]
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DD SSM_DR6 - ($ + 4 - _SmiEntryPoint + 8000h)
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DB 48h, 8bh, 15h ; mov rdx, [rip + disp32]
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DD SSM_DR7 - ($ + 4 - _SmiEntryPoint + 8000h)
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mov dr6, rcx
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mov dr7, rdx
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@1:
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mov rcx, [rsp] ; rcx <- CpuIndex
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mov rax, SmiRendezvous ; rax <- absolute addr of SmiRedezvous
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;
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; Save FP registers
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;
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sub rsp, 208h
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DB 48h ; FXSAVE64
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fxsave [rsp]
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add rsp, -20h
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call rax
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add rsp, 20h
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;
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; Restore FP registers
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;
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DB 48h ; FXRSTOR64
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fxrstor [rsp]
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mov rax, offset FeaturePcdGet (PcdCpuSmmDebug) ;Get absolute address. Avoid RIP relative addressing
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cmp byte ptr [rax], 0
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jz @2
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mov rdx, dr7
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mov rcx, dr6
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DB 48h, 89h, 15h ; mov [rip + disp32], rdx
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DD SSM_DR7 - ($ + 4 - _SmiEntryPoint + 8000h)
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DB 48h, 89h, 0dh ; mov [rip + disp32], rcx
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DD SSM_DR6 - ($ + 4 - _SmiEntryPoint + 8000h)
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@2:
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rsm
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gcSmiHandlerSize DW $ - _SmiEntryPoint
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END
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