audk/UefiCpuPkg/ResetVector/Vtf0/Ia16/Real16ToFlat32.asm

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;------------------------------------------------------------------------------
; @file
; Transition from 16 bit real mode into 32 bit flat protected mode
;
; Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
;------------------------------------------------------------------------------
%define SEC_DEFAULT_CR0 0x40000023
%define SEC_DEFAULT_CR4 0x640
BITS 16
;
; Modified: EAX, EBX
;
UefiCpuPkg/ResetVector/Vtf0: document segment register setup "Main.asm" calls TransitionFromReal16To32BitFlat (and does some other things) before it jumps to the platform's SEC entry point. TransitionFromReal16To32BitFlat enters big real mode, and sets the DS, ES, FS, GS, and SS registers to offset ("selector") LINEAR_SEL in the GDT (defined in "UefiCpuPkg/ResetVector/Vtf0/Ia16/Real16ToFlat32.asm"). The GDT entry ("segment descriptor") at LINEAR_SEL defines a segment covering the full 32-bit address space, meant for "read/write data". Document this fact for all the affected segment registers, as output parameters for TransitionFromReal16To32BitFlat, saying "Selector allowing flat access to all addresses". For 64-bit SEC, "Main.asm" calls Transition32FlatTo64Flat in addition, between calling TransitionFromReal16To32BitFlat and jumping to the SEC entry point. Transition32FlatTo64Flat enters long mode. In long mode, segmentation is largely ignored: - all segments are considered flat (covering the whole 64-bit address space), - with the (possible) exception of FS and GS, whose bases can still be changed, albeit with new methods, not through the GDT. (Through the IA32_FS_BASE and IA32_GS_BASE Model Specific Registers, and/or the WRFSBASE, WRGSBASE and SWAPGS instructions.) Thus, document the segment registers with the same "Selector allowing flat access to all addresses" language on the "Main.asm" level too, since that is valid for both 32-bit and 64-bit modes. (Technically, "Main.asm" does not return, but RBP/EBP, passed similarly to the SEC entry point, is already documented as an output parameter.) Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Eric Dong <eric.dong@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Suggested-by: Jordan Justen <jordan.l.justen@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2017-11-15 19:00:17 +01:00
; @param[out] DS Selector allowing flat access to all addresses
; @param[out] ES Selector allowing flat access to all addresses
; @param[out] FS Selector allowing flat access to all addresses
; @param[out] GS Selector allowing flat access to all addresses
; @param[out] SS Selector allowing flat access to all addresses
;
TransitionFromReal16To32BitFlat:
debugShowPostCode POSTCODE_16BIT_MODE
cli
mov bx, 0xf000
mov ds, bx
mov bx, ADDR16_OF(gdtr)
o32 lgdt [cs:bx]
mov eax, SEC_DEFAULT_CR0
mov cr0, eax
jmp LINEAR_CODE_SEL:dword ADDR_OF(jumpTo32BitAndLandHere)
BITS 32
jumpTo32BitAndLandHere:
mov eax, SEC_DEFAULT_CR4
mov cr4, eax
debugShowPostCode POSTCODE_32BIT_MODE
mov ax, LINEAR_SEL
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
mov ss, ax
OneTimeCallRet TransitionFromReal16To32BitFlat
ALIGN 2
gdtr:
dw GDT_END - GDT_BASE - 1 ; GDT limit
dd ADDR_OF(GDT_BASE)
ALIGN 16
;
; Macros for GDT entries
;
%define PRESENT_FLAG(p) (p << 7)
%define DPL(dpl) (dpl << 5)
%define SYSTEM_FLAG(s) (s << 4)
%define DESC_TYPE(t) (t)
; Type: data, expand-up, writable, accessed
%define DATA32_TYPE 3
; Type: execute, readable, expand-up, accessed
%define CODE32_TYPE 0xb
; Type: execute, readable, expand-up, accessed
%define CODE64_TYPE 0xb
%define GRANULARITY_FLAG(g) (g << 7)
%define DEFAULT_SIZE32(d) (d << 6)
%define CODE64_FLAG(l) (l << 5)
%define UPPER_LIMIT(l) (l)
;
; The Global Descriptor Table (GDT)
;
GDT_BASE:
; null descriptor
NULL_SEL equ $-GDT_BASE
DW 0 ; limit 15:0
DW 0 ; base 15:0
DB 0 ; base 23:16
DB 0 ; sys flag, dpl, type
DB 0 ; limit 19:16, flags
DB 0 ; base 31:24
; linear data segment descriptor
LINEAR_SEL equ $-GDT_BASE
DW 0xffff ; limit 15:0
DW 0 ; base 15:0
DB 0 ; base 23:16
DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(DATA32_TYPE)
DB GRANULARITY_FLAG(1)|DEFAULT_SIZE32(1)|CODE64_FLAG(0)|UPPER_LIMIT(0xf)
DB 0 ; base 31:24
; linear code segment descriptor
LINEAR_CODE_SEL equ $-GDT_BASE
DW 0xffff ; limit 15:0
DW 0 ; base 15:0
DB 0 ; base 23:16
DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE32_TYPE)
DB GRANULARITY_FLAG(1)|DEFAULT_SIZE32(1)|CODE64_FLAG(0)|UPPER_LIMIT(0xf)
DB 0 ; base 31:24
%ifdef ARCH_X64
; linear code (64-bit) segment descriptor
LINEAR_CODE64_SEL equ $-GDT_BASE
DW 0xffff ; limit 15:0
DW 0 ; base 15:0
DB 0 ; base 23:16
DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE64_TYPE)
DB GRANULARITY_FLAG(1)|DEFAULT_SIZE32(0)|CODE64_FLAG(1)|UPPER_LIMIT(0xf)
DB 0 ; base 31:24
%endif
GDT_END: