2010-09-07 12:23:05 +02:00
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;------------------------------------------------------------------------------
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; @file
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; Transition from 16 bit real mode into 32 bit flat protected mode
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;
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; Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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;------------------------------------------------------------------------------
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%define SEC_DEFAULT_CR0 0x40000023
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%define SEC_DEFAULT_CR4 0x640
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BITS 16
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;
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; Modified: EAX, EBX
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;
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UefiCpuPkg/ResetVector/Vtf0: document segment register setup
"Main.asm" calls TransitionFromReal16To32BitFlat (and does some other
things) before it jumps to the platform's SEC entry point.
TransitionFromReal16To32BitFlat enters big real mode, and sets the DS, ES,
FS, GS, and SS registers to offset ("selector") LINEAR_SEL in the GDT
(defined in "UefiCpuPkg/ResetVector/Vtf0/Ia16/Real16ToFlat32.asm"). The
GDT entry ("segment descriptor") at LINEAR_SEL defines a segment covering
the full 32-bit address space, meant for "read/write data".
Document this fact for all the affected segment registers, as output
parameters for TransitionFromReal16To32BitFlat, saying "Selector allowing
flat access to all addresses".
For 64-bit SEC, "Main.asm" calls Transition32FlatTo64Flat in addition,
between calling TransitionFromReal16To32BitFlat and jumping to the SEC
entry point. Transition32FlatTo64Flat enters long mode. In long mode,
segmentation is largely ignored:
- all segments are considered flat (covering the whole 64-bit address
space),
- with the (possible) exception of FS and GS, whose bases can still be
changed, albeit with new methods, not through the GDT. (Through the
IA32_FS_BASE and IA32_GS_BASE Model Specific Registers, and/or the
WRFSBASE, WRGSBASE and SWAPGS instructions.)
Thus, document the segment registers with the same "Selector allowing flat
access to all addresses" language on the "Main.asm" level too, since that
is valid for both 32-bit and 64-bit modes.
(Technically, "Main.asm" does not return, but RBP/EBP, passed similarly to
the SEC entry point, is already documented as an output parameter.)
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Suggested-by: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2017-11-15 19:00:17 +01:00
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; @param[out] DS Selector allowing flat access to all addresses
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; @param[out] ES Selector allowing flat access to all addresses
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; @param[out] FS Selector allowing flat access to all addresses
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; @param[out] GS Selector allowing flat access to all addresses
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; @param[out] SS Selector allowing flat access to all addresses
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;
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2010-09-07 12:23:05 +02:00
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TransitionFromReal16To32BitFlat:
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debugShowPostCode POSTCODE_16BIT_MODE
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cli
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mov bx, 0xf000
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mov ds, bx
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mov bx, ADDR16_OF(gdtr)
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o32 lgdt [cs:bx]
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mov eax, SEC_DEFAULT_CR0
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mov cr0, eax
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jmp LINEAR_CODE_SEL:dword ADDR_OF(jumpTo32BitAndLandHere)
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BITS 32
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jumpTo32BitAndLandHere:
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mov eax, SEC_DEFAULT_CR4
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mov cr4, eax
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debugShowPostCode POSTCODE_32BIT_MODE
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mov ax, LINEAR_SEL
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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mov ss, ax
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OneTimeCallRet TransitionFromReal16To32BitFlat
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ALIGN 2
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gdtr:
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dw GDT_END - GDT_BASE - 1 ; GDT limit
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dd ADDR_OF(GDT_BASE)
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ALIGN 16
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;
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; Macros for GDT entries
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;
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%define PRESENT_FLAG(p) (p << 7)
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%define DPL(dpl) (dpl << 5)
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%define SYSTEM_FLAG(s) (s << 4)
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%define DESC_TYPE(t) (t)
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; Type: data, expand-up, writable, accessed
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%define DATA32_TYPE 3
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; Type: execute, readable, expand-up, accessed
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%define CODE32_TYPE 0xb
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; Type: execute, readable, expand-up, accessed
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%define CODE64_TYPE 0xb
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%define GRANULARITY_FLAG(g) (g << 7)
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%define DEFAULT_SIZE32(d) (d << 6)
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%define CODE64_FLAG(l) (l << 5)
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%define UPPER_LIMIT(l) (l)
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;
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; The Global Descriptor Table (GDT)
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;
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GDT_BASE:
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; null descriptor
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NULL_SEL equ $-GDT_BASE
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DW 0 ; limit 15:0
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DW 0 ; base 15:0
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DB 0 ; base 23:16
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DB 0 ; sys flag, dpl, type
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DB 0 ; limit 19:16, flags
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DB 0 ; base 31:24
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; linear data segment descriptor
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LINEAR_SEL equ $-GDT_BASE
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DW 0xffff ; limit 15:0
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DW 0 ; base 15:0
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DB 0 ; base 23:16
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DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(DATA32_TYPE)
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DB GRANULARITY_FLAG(1)|DEFAULT_SIZE32(1)|CODE64_FLAG(0)|UPPER_LIMIT(0xf)
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DB 0 ; base 31:24
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; linear code segment descriptor
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LINEAR_CODE_SEL equ $-GDT_BASE
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DW 0xffff ; limit 15:0
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DW 0 ; base 15:0
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DB 0 ; base 23:16
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DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE32_TYPE)
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DB GRANULARITY_FLAG(1)|DEFAULT_SIZE32(1)|CODE64_FLAG(0)|UPPER_LIMIT(0xf)
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DB 0 ; base 31:24
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%ifdef ARCH_X64
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; linear code (64-bit) segment descriptor
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LINEAR_CODE64_SEL equ $-GDT_BASE
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DW 0xffff ; limit 15:0
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DW 0 ; base 15:0
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DB 0 ; base 23:16
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DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE64_TYPE)
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DB GRANULARITY_FLAG(1)|DEFAULT_SIZE32(0)|CODE64_FLAG(1)|UPPER_LIMIT(0xf)
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DB 0 ; base 31:24
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%endif
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GDT_END:
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