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audk/UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf

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UefiCpuPkg: Add CpuDxeRiscV64 module REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076 This is copied from edk2-platforms/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe and added the RISCV_EFI_BOOT_PROTOCOL support. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Daniel Schaefer <git@danielschaefer.me> Cc: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Abner Chang <abner.chang@amd.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
2022-12-15 06:43:44 +01:00
## @file
# RISC-V CPU DXE module.
#
# Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
[Defines]
INF_VERSION = 0x0001001B
BASE_NAME = CpuDxeRiscV64
MODULE_UNI_FILE = CpuDxeRiscV64.uni
FILE_GUID = BDEA19E2-778F-473C-BF82-5E38D6A27765
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = InitializeCpu
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
UefiCpuPkg/UefiCpuPkg.dec
[LibraryClasses]
BaseLib
BaseMemoryLib
CpuLib
DebugLib
DxeServicesTableLib
MemoryAllocationLib
UefiBootServicesTableLib
UefiDriverEntryPoint
UefiLib
CpuExceptionHandlerLib
HobLib
ReportStatusCodeLib
TimerLib
PeCoffGetEntryPointLib
RiscVSbiLib
UefiCpuPkg: RISC-V: Support MMU with SV39/48/57 mode During CpuDxe initialization, MMU will be setup with the highest mode that HW supports. Signed-off-by: Tuan Phan <tphan@ventanamicro.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-07-14 21:08:24 +02:00
RiscVMmuLib
CacheMaintenanceLib
UefiCpuPkg: Add CpuDxeRiscV64 module REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076 This is copied from edk2-platforms/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe and added the RISCV_EFI_BOOT_PROTOCOL support. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Daniel Schaefer <git@danielschaefer.me> Cc: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Abner Chang <abner.chang@amd.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
2022-12-15 06:43:44 +01:00
[Sources]
CpuDxe.c
CpuDxe.h
[Protocols]
gEfiCpuArchProtocolGuid ## PRODUCES
gRiscVEfiBootProtocolGuid ## PRODUCES
[Guids]
gIdleLoopEventGuid ## CONSUMES ## Event
[Ppis]
gEfiSecPlatformInformation2PpiGuid ## UNDEFINED # HOB
gEfiSecPlatformInformationPpiGuid ## UNDEFINED # HOB
[Pcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard ## CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdHeapGuardPropertyMask ## CONSUMES
gEfiMdeModulePkgTokenSpaceGuid.PcdNullPointerDetectionPropertyMask ## CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList ## CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize ## CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency ## CONSUMES
[Depex]
TRUE
[UserExtensions.TianoCore."ExtraFiles"]
CpuDxeRiscV64Extra.uni