2011-02-01 06:41:42 +01:00
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/** @file
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*
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* Copyright (c) 2011, ARM Limited. All rights reserved.
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*
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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*
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**/
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#include <Library/ArmPlatformLib.h>
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#include <Library/DebugLib.h>
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#include <Library/PcdLib.h>
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#include <Library/MemoryAllocationLib.h>
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2011-03-05 14:23:47 +01:00
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#include <Library/IoLib.h>
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2011-02-01 06:41:42 +01:00
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// DDR attributes
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#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
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#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
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#define DDR_ATTRIBUTES_SECURE_CACHED ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_BACK
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#define DDR_ATTRIBUTES_SECURE_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_SECURE_UNCACHED_UNBUFFERED
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/**
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Return the information about the memory region in permanent memory used by PEI
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One of the PEI Module must install the permament memory used by PEI. This function returns the
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information about this region for your platform to this PEIM module.
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@param[out] PeiMemoryBase Base of the memory region used by PEI core and modules
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@param[out] PeiMemorySize Size of the memory region used by PEI core and modules
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**/
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VOID ArmPlatformGetPeiMemory (
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OUT UINTN* PeiMemoryBase,
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OUT UINTN* PeiMemorySize
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) {
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ASSERT((PeiMemoryBase != NULL) && (PeiMemorySize != NULL));
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*PeiMemoryBase = ARM_EB_DRAM_BASE + ARM_EB_EFI_FIX_ADDRESS_REGION_SZ;
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*PeiMemorySize = ARM_EB_EFI_MEMORY_REGION_SZ;
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}
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/**
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Return the Virtual Memory Map of your platform
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This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.
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@param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-
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Virtual Memory mapping. This array must be ended by a zero-filled
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entry
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**/
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VOID ArmPlatformGetVirtualMemoryMap(ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap) {
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UINT32 CacheAttributes;
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BOOLEAN bTrustzoneSupport = FALSE;
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UINTN Index = 0;
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ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
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ASSERT(VirtualMemoryMap != NULL);
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VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * 9);
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if (VirtualMemoryTable == NULL) {
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return;
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}
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if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
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CacheAttributes = (bTrustzoneSupport ? DDR_ATTRIBUTES_CACHED : DDR_ATTRIBUTES_SECURE_CACHED);
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} else {
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CacheAttributes = (bTrustzoneSupport ? DDR_ATTRIBUTES_UNCACHED : DDR_ATTRIBUTES_SECURE_UNCACHED);
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}
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// ReMap (Either NOR Flash or DRAM)
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VirtualMemoryTable[Index].PhysicalBase = ARM_EB_REMAP_BASE;
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VirtualMemoryTable[Index].VirtualBase = ARM_EB_REMAP_BASE;
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VirtualMemoryTable[Index].Length = ARM_EB_REMAP_SZ;
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VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;
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// DDR
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VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_DRAM_BASE;
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VirtualMemoryTable[Index].VirtualBase = ARM_EB_DRAM_BASE;
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VirtualMemoryTable[Index].Length = ARM_EB_DRAM_SZ;
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VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;
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// SMC CS7
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VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_SMB_MB_ON_CHIP_PERIPH_BASE;
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VirtualMemoryTable[Index].VirtualBase = ARM_EB_SMB_MB_ON_CHIP_PERIPH_BASE;
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VirtualMemoryTable[Index].Length = ARM_EB_SMB_MB_ON_CHIP_PERIPH_SZ;
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VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);
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// SMB CS0-CS1 - NOR Flash 1 & 2
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VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_SMB_NOR_BASE;
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VirtualMemoryTable[Index].VirtualBase = ARM_EB_SMB_NOR_BASE;
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VirtualMemoryTable[Index].Length = ARM_EB_SMB_NOR_SZ + ARM_EB_SMB_DOC_SZ;
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VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);
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// SMB CS2 - SRAM
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VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_SMB_SRAM_BASE;
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VirtualMemoryTable[Index].VirtualBase = ARM_EB_SMB_SRAM_BASE;
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VirtualMemoryTable[Index].Length = ARM_EB_SMB_SRAM_SZ;
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VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;
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// SMB CS3-CS6 - Motherboard Peripherals
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VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_SMB_PERIPH_BASE;
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VirtualMemoryTable[Index].VirtualBase = ARM_EB_SMB_PERIPH_BASE;
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VirtualMemoryTable[Index].Length = ARM_EB_SMB_PERIPH_SZ;
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VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);
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// If a Logic Tile is connected to The ARM Versatile Express Motherboard
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if (MmioRead32(ARM_EB_SYS_PROCID1_REG) != 0) {
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VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_LOGIC_TILE_BASE;
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VirtualMemoryTable[Index].VirtualBase = ARM_EB_LOGIC_TILE_BASE;
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VirtualMemoryTable[Index].Length = ARM_EB_LOGIC_TILE_SZ;
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VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);
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}
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// End of Table
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VirtualMemoryTable[++Index].PhysicalBase = 0;
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VirtualMemoryTable[Index].VirtualBase = 0;
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VirtualMemoryTable[Index].Length = 0;
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VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
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*VirtualMemoryMap = VirtualMemoryTable;
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}
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/**
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Return the EFI Memory Map of your platform
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This EFI Memory Map of the System Memory is used by MemoryInitPei module to create the Resource
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Descriptor HOBs used by DXE core.
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@param[out] EfiMemoryMap Array of ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR describing an
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EFI Memory region. This array must be ended by a zero-filled entry
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**/
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VOID ArmPlatformGetEfiMemoryMap (
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OUT ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR** EfiMemoryMap
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) {
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EFI_RESOURCE_ATTRIBUTE_TYPE Attributes;
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UINT64 MemoryBase;
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UINTN Index = 0;
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ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR *EfiMemoryTable;
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ASSERT(EfiMemoryMap != NULL);
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EfiMemoryTable = (ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(sizeof(ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR) * 6);
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Attributes =
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(
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EFI_RESOURCE_ATTRIBUTE_PRESENT |
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EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
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EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
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EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
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EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
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EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
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EFI_RESOURCE_ATTRIBUTE_TESTED
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);
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MemoryBase = ARM_EB_DRAM_BASE;
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// Memory Reserved for fixed address allocations (such as Exception Vector Table)
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EfiMemoryTable[Index].ResourceAttribute = Attributes;
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EfiMemoryTable[Index].PhysicalStart = MemoryBase;
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EfiMemoryTable[Index].NumberOfBytes = ARM_EB_EFI_FIX_ADDRESS_REGION_SZ;
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MemoryBase += ARM_EB_EFI_FIX_ADDRESS_REGION_SZ;
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// Memory declared to PEI as permanent memory for PEI and DXE
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EfiMemoryTable[++Index].ResourceAttribute = Attributes;
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EfiMemoryTable[Index].PhysicalStart = MemoryBase;
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EfiMemoryTable[Index].NumberOfBytes = ARM_EB_EFI_MEMORY_REGION_SZ;
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MemoryBase += ARM_EB_EFI_MEMORY_REGION_SZ;
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// We must reserve the memory used by the Firmware Volume copied in DRAM at 0x80000000
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if (FeaturePcdGet(PcdStandalone) == FALSE) {
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// Chunk between the EFI Memory region and the firmware
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EfiMemoryTable[++Index].ResourceAttribute = Attributes;
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EfiMemoryTable[Index].PhysicalStart = MemoryBase;
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EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdEmbeddedFdBaseAddress) - MemoryBase;
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// Chunk reserved by the firmware in DRAM
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EfiMemoryTable[++Index].ResourceAttribute = Attributes & (~EFI_RESOURCE_ATTRIBUTE_PRESENT);
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EfiMemoryTable[Index].PhysicalStart = PcdGet32(PcdEmbeddedFdBaseAddress);
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EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdEmbeddedFdSize);
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MemoryBase = PcdGet32(PcdEmbeddedFdBaseAddress) + PcdGet32(PcdEmbeddedFdSize);
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}
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// We allocate all the remain memory as untested system memory
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EfiMemoryTable[++Index].ResourceAttribute = Attributes & (~EFI_RESOURCE_ATTRIBUTE_TESTED);
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EfiMemoryTable[Index].PhysicalStart = MemoryBase;
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EfiMemoryTable[Index].NumberOfBytes = ARM_EB_DRAM_SZ - (MemoryBase-ARM_EB_DRAM_BASE);
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EfiMemoryTable[++Index].ResourceAttribute = 0;
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EfiMemoryTable[Index].PhysicalStart = 0;
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EfiMemoryTable[Index].NumberOfBytes = 0;
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*EfiMemoryMap = EfiMemoryTable;
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}
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