audk/DynamicTablesPkg/Library/Common/SsdtSerialPortFixupLib/SsdtSerialPortTemplate.asl

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DynamicTablesPkg: SSDT Serial Port Fixup library According to Arm Server Base Boot Requirements, Platform Design Document version 1.2 revision D, September 2, 2019, section '4.2.1.8 SPCR'; The SPCR console device must be included in the DSDT. Additionally, it is often desirable to describe the serial ports available on a platform so that they are available for use by a rich OS. To facilitate the description of serial ports on a platform a common SSDT Serial Port Fixup library is introduced. It provides interfaces to build a SSDT serial port definition block table based on the serial port information. The SSDT Serial Port Fixup library is used by the SPCR, DBG2 and SSDT Serial Port generator to describe the serial port information in a definition block. +------------+ +------------+ +------------+ | SPCR Gen | | DBG2 Gen | | SERIAL Gen | +------------+ +------------+ +------------+ +----------------------------------+ | SSDT Serial Port Fixup library | +----------------------------------+ The SSDT Serial Port Fixup library: - Parses the SSDT Serial Port template using the AmlLib library to generate an AML tree. - Updates the _UID, _HID and _CID values. - Fixes up the Serial port base address, length and the interrupt number in the _CRS descriptor. - Fixes up the serial-port name. - Serialises the AML Tree to a buffer containing the definition block data. The definition block data is then installed by the corresponding table generator. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-08-06 09:04:50 +02:00
/** @file
SSDT Serial Template
Copyright (c) 2019 - 2020, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@par Reference(s):
- Arm Server Base Boot Requirements (SBBR), s4.2.1.8 "SPCR".
@par Glossary:
- {template} - Data fixed up using AML Fixup APIs.
**/
DefinitionBlock ("SsdtSerialPortTemplate.aml", "SSDT", 2, "ARMLTD", "SERIAL", 1) {
Scope (_SB) {
// UART PL011
Device (COM0) { // {template}
Name (_UID, 0x0) // {template}
Name (_HID, "HID0000") // {template}
Name (_CID, "CID0000") // {template}
Method(_STA) {
Return(0xF)
}
Name (_CRS, ResourceTemplate() {
QWordMemory (
, // ResourceUsage
, // Decode
, // IsMinFixed
, // IsMaxFixed
, // Cacheable
ReadWrite, // ReadAndWrite
0x0, // AddressGranularity
0xA0000000, // AddressMinimum // {template}
0xAFFFFFFF, // AddressMaximum // {template}
0, // AddressTranslation
0x10000000, // RangeLength // {template}
, // ResourceSourceIndex
, // ResourceSource
, // DescriptorName
, // MemoryRangeType
// TranslationType
) // QWordMemory
Interrupt (
ResourceConsumer, // ResourceUsage
Level, // EdgeLevel
ActiveHigh, // ActiveLevel
Exclusive, // Shared
, // ResourceSourceIndex
, // ResourceSource
// DescriptorName
) {
0xA5 // {template}
} // Interrupt
}) // Name
} // Device
} // Scope (_SB)
}