mirror of https://github.com/acidanthera/audk.git
88 lines
3.7 KiB
Plaintext
88 lines
3.7 KiB
Plaintext
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#/** @file
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#
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# Copyright (c) 2014, Linaro Limited. All rights reserved.
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#**/
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[Defines]
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DEC_SPECIFICATION = 0x00010005
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PACKAGE_NAME = ArmVirtPkg
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PACKAGE_GUID = A0B31216-508E-4025-BEAB-56D836C66F0A
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PACKAGE_VERSION = 0.1
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################################################################################
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#
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# Include Section - list of Include Paths that are provided by this package.
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# Comments are used for Keywords and Module Types.
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#
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# Supported Module Types:
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# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
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#
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################################################################################
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[Includes.common]
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Include # Root include for the package
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[Guids.common]
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gArmVirtTokenSpaceGuid = { 0x0B6F5CA7, 0x4F53, 0x445A, { 0xB7, 0x6E, 0x2E, 0x36, 0x5B, 0x80, 0x63, 0x66 } }
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gEarlyPL011BaseAddressGuid = { 0xB199DEA9, 0xFD5C, 0x4A84, { 0x80, 0x82, 0x2F, 0x41, 0x70, 0x78, 0x03, 0x05 } }
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[PcdsFixedAtBuild, PcdsPatchableInModule]
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#
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# This is the physical address where the device tree is expected to be stored
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# upon first entry into UEFI. This needs to be a FixedAtBuild PCD, so that we
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# can do a first pass over the device tree in the SEC phase to discover the
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# UART base address.
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#
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gArmVirtTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress|0x0|UINT64|0x00000001
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#
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# Padding in bytes to add to the device tree allocation, so that the DTB can
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# be modified in place (default: 256 bytes)
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#
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gArmVirtTokenSpaceGuid.PcdDeviceTreeAllocationPadding|256|UINT32|0x00000002
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[PcdsDynamic, PcdsFixedAtBuild]
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#
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# ARM PSCI function invocations can be done either through hypervisor
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# calls (HVC) or secure monitor calls (SMC).
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# PcdArmPsciMethod == 1 : use HVC
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# PcdArmPsciMethod == 2 : use SMC
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#
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gArmVirtTokenSpaceGuid.PcdArmPsciMethod|0|UINT32|0x00000003
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gArmVirtTokenSpaceGuid.PcdFwCfgSelectorAddress|0x0|UINT64|0x00000004
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gArmVirtTokenSpaceGuid.PcdFwCfgDataAddress|0x0|UINT64|0x00000005
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[PcdsFeatureFlag]
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#
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# "Map PCI MMIO as Cached"
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#
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# Due to the way Stage1 and Stage2 mappings are combined on Aarch64, and
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# because KVM -- for the time being -- does not try to interfere with the
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# Stage1 mappings, we must not set EFI_MEMORY_UC for emulated PCI MMIO
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# regions.
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#
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# EFI_MEMORY_UC is mapped to Device-nGnRnE, and that Stage1 attribute would
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# direct guest writes to host DRAM immediately, bypassing the cache
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# regardless of Stage2 attributes. However, QEMU's reads of the same range
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# can easily be served from the (stale) CPU cache.
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#
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# Setting this PCD to TRUE will use EFI_MEMORY_WB for mapping PCI MMIO
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# regions, which ensures that guest writes to such regions go through the CPU
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# cache. Strictly speaking this is wrong, but it is needed as a temporary
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# workaround for emulated PCI devices. Setting the PCD to FALSE results in
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# the theoretically correct EFI_MEMORY_UC mapping, and should be the long
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# term choice, especially with assigned devices.
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#
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# The default is to turn off the kludge; DSC's can selectively enable it.
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#
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gArmVirtTokenSpaceGuid.PcdKludgeMapPciMmioAsCached|FALSE|BOOLEAN|0x00000006
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