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audk/MdePkg/Library/BaseLib/AArch64/DisableInterrupts.S

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MdePkg/BaseLib: Added ARM Aarch64 architecture support Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Signed-off-by: Olivier Martin <olivier.martin@arm.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14515 6f19259b-4bc3-4df7-8a09-765794883524
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#------------------------------------------------------------------------------
#
# DisableInterrupts() for AArch64
#
# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
MdePkg: Replace BSD License with BSD+Patent License https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-04-04 01:06:00 +02:00
# SPDX-License-Identifier: BSD-2-Clause-Patent
MdePkg/BaseLib: Added ARM Aarch64 architecture support Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Signed-off-by: Olivier Martin <olivier.martin@arm.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14515 6f19259b-4bc3-4df7-8a09-765794883524
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#
#------------------------------------------------------------------------------
.text
.p2align 2
MdePkg/AArch64: use GCC_ASM_EXPORT to export functions This ensures the .type directive is used to mark them as function symbols Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <Olivier.Martin@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17904 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-09 12:43:27 +02:00
GCC_ASM_EXPORT(DisableInterrupts)
MdePkg/BaseLib: Added ARM Aarch64 architecture support Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Signed-off-by: Olivier Martin <olivier.martin@arm.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14515 6f19259b-4bc3-4df7-8a09-765794883524
2013-07-29 11:55:38 +02:00
MdePkg: BaseLib: fix AArch64 DAIF interrupt mask definitions The AArch64 DAIF bits are different for reading (mrs) versus writing (msr). The bitmask definitions assumed they were the same causing incorrect results when trying to determine the current interrupt state through GetInterruptState. The logic for interpreting the DAIF read data using the csel instruction was also incorrect and is fixed. Replaced the magic numbers in DisableInterrupts.S and EnableInterrupts.S with definitions for the DAIF write (daifset/daifclr) IRQ field. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eugene Cohen <eugene@hp.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2016-02-22 22:59:52 +01:00
.set DAIF_WR_IRQ_BIT, (1 << 1)
MdePkg/BaseLib: Added ARM Aarch64 architecture support Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Signed-off-by: Olivier Martin <olivier.martin@arm.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14515 6f19259b-4bc3-4df7-8a09-765794883524
2013-07-29 11:55:38 +02:00
#/**
# Disables CPU interrupts.
#
#**/
#VOID
#EFIAPI
#DisableInterrupts (
# VOID
# );
#
ASM_PFX(DisableInterrupts):
MdePkg: BaseLib: fix AArch64 DAIF interrupt mask definitions The AArch64 DAIF bits are different for reading (mrs) versus writing (msr). The bitmask definitions assumed they were the same causing incorrect results when trying to determine the current interrupt state through GetInterruptState. The logic for interpreting the DAIF read data using the csel instruction was also incorrect and is fixed. Replaced the magic numbers in DisableInterrupts.S and EnableInterrupts.S with definitions for the DAIF write (daifset/daifclr) IRQ field. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eugene Cohen <eugene@hp.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2016-02-22 22:59:52 +01:00
msr daifset, #DAIF_WR_IRQ_BIT
MdePkg/BaseLib: Added ARM Aarch64 architecture support Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Signed-off-by: Olivier Martin <olivier.martin@arm.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14515 6f19259b-4bc3-4df7-8a09-765794883524
2013-07-29 11:55:38 +02:00
ret