audk/UefiCpuPkg/CpuDxe/CpuGdt.h

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/** @file
C based implemention of IA32 interrupt handling only
requiring a minimal assembly interrupt entry point.
UefiCpuPkg: CpuDxe: Update GDT to be consistent with DxeIplPeim The PiSmmCpuDxeSmm module makes some assumptions about GDT selectors that are based on the GDT layout from the DxeIplPeim. For example, the protected mode entry code and (where appropriate) the long mode entry code in the UefiCpuPkg/PiSmmCpuDxeSmm/*/MpFuncs.* assembly files, which are used during S3 resume, open-code segment selector values that depend on DxeIplPeim's GDT layout. This updates the CpuDxe module to use the same GDT layout as the DxeIplPeim. This enables modules that are dispatched after CpuDxe to find, and potentially save and restore, a GDT layout that matches that of DxeIplPeim. The DxeIplPeim has a 2 GDT entries for data selectors that are identical. These are LINEAR_SEL (GDT Offset 0x08)and LINEAR_DATA64_SEL (GDT offset 0x30). LINEAL_SEL is used for for IA32 DXE and the LINEAR_DATA64_SEL is used for X64 DXE. This duplicate data selector was added to the CpuDxe module to keep the GDT and all selectors consistent. Using a consistent GDT also improves debug experience. Reported-by: Laszlo Ersek <lersek@redhat.com> Analyzed-by: Laszlo Ersek <lersek@redhat.com> Link: http://article.gmane.org/gmane.comp.bios.edk2.devel/3568 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18710 6f19259b-4bc3-4df7-8a09-765794883524
2015-10-30 18:32:27 +01:00
Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _CPU_GDT_H_
#define _CPU_GDT_H_
//
// Local structure definitions
//
#pragma pack (1)
//
// Global Descriptor Entry structures
//
typedef struct _GDT_ENTRY {
UINT16 Limit15_0;
UINT16 Base15_0;
UINT8 Base23_16;
UINT8 Type;
UINT8 Limit19_16_and_flags;
UINT8 Base31_24;
} GDT_ENTRY;
typedef
struct _GDT_ENTRIES {
GDT_ENTRY Null;
GDT_ENTRY Linear;
GDT_ENTRY LinearCode;
GDT_ENTRY SysData;
GDT_ENTRY SysCode;
GDT_ENTRY Spare4;
UefiCpuPkg: CpuDxe: Update GDT to be consistent with DxeIplPeim The PiSmmCpuDxeSmm module makes some assumptions about GDT selectors that are based on the GDT layout from the DxeIplPeim. For example, the protected mode entry code and (where appropriate) the long mode entry code in the UefiCpuPkg/PiSmmCpuDxeSmm/*/MpFuncs.* assembly files, which are used during S3 resume, open-code segment selector values that depend on DxeIplPeim's GDT layout. This updates the CpuDxe module to use the same GDT layout as the DxeIplPeim. This enables modules that are dispatched after CpuDxe to find, and potentially save and restore, a GDT layout that matches that of DxeIplPeim. The DxeIplPeim has a 2 GDT entries for data selectors that are identical. These are LINEAR_SEL (GDT Offset 0x08)and LINEAR_DATA64_SEL (GDT offset 0x30). LINEAL_SEL is used for for IA32 DXE and the LINEAR_DATA64_SEL is used for X64 DXE. This duplicate data selector was added to the CpuDxe module to keep the GDT and all selectors consistent. Using a consistent GDT also improves debug experience. Reported-by: Laszlo Ersek <lersek@redhat.com> Analyzed-by: Laszlo Ersek <lersek@redhat.com> Link: http://article.gmane.org/gmane.comp.bios.edk2.devel/3568 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18710 6f19259b-4bc3-4df7-8a09-765794883524
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GDT_ENTRY LinearData64;
GDT_ENTRY LinearCode64;
GDT_ENTRY Spare5;
} GDT_ENTRIES;
#pragma pack ()
#define NULL_SEL OFFSET_OF (GDT_ENTRIES, Null)
#define LINEAR_SEL OFFSET_OF (GDT_ENTRIES, Linear)
#define LINEAR_CODE_SEL OFFSET_OF (GDT_ENTRIES, LinearCode)
#define SYS_DATA_SEL OFFSET_OF (GDT_ENTRIES, SysData)
#define SYS_CODE_SEL OFFSET_OF (GDT_ENTRIES, SysCode)
#define SPARE4_SEL OFFSET_OF (GDT_ENTRIES, Spare4)
UefiCpuPkg: CpuDxe: Update GDT to be consistent with DxeIplPeim The PiSmmCpuDxeSmm module makes some assumptions about GDT selectors that are based on the GDT layout from the DxeIplPeim. For example, the protected mode entry code and (where appropriate) the long mode entry code in the UefiCpuPkg/PiSmmCpuDxeSmm/*/MpFuncs.* assembly files, which are used during S3 resume, open-code segment selector values that depend on DxeIplPeim's GDT layout. This updates the CpuDxe module to use the same GDT layout as the DxeIplPeim. This enables modules that are dispatched after CpuDxe to find, and potentially save and restore, a GDT layout that matches that of DxeIplPeim. The DxeIplPeim has a 2 GDT entries for data selectors that are identical. These are LINEAR_SEL (GDT Offset 0x08)and LINEAR_DATA64_SEL (GDT offset 0x30). LINEAL_SEL is used for for IA32 DXE and the LINEAR_DATA64_SEL is used for X64 DXE. This duplicate data selector was added to the CpuDxe module to keep the GDT and all selectors consistent. Using a consistent GDT also improves debug experience. Reported-by: Laszlo Ersek <lersek@redhat.com> Analyzed-by: Laszlo Ersek <lersek@redhat.com> Link: http://article.gmane.org/gmane.comp.bios.edk2.devel/3568 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18710 6f19259b-4bc3-4df7-8a09-765794883524
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#define LINEAR_DATA64_SEL OFFSET_OF (GDT_ENTRIES, LinearData64)
#define LINEAR_CODE64_SEL OFFSET_OF (GDT_ENTRIES, LinearCode64)
#define SPARE5_SEL OFFSET_OF (GDT_ENTRIES, Spare5)
#if defined (MDE_CPU_IA32)
#define CPU_CODE_SEL LINEAR_CODE_SEL
#define CPU_DATA_SEL LINEAR_SEL
#elif defined (MDE_CPU_X64)
#define CPU_CODE_SEL LINEAR_CODE64_SEL
UefiCpuPkg: CpuDxe: Update GDT to be consistent with DxeIplPeim The PiSmmCpuDxeSmm module makes some assumptions about GDT selectors that are based on the GDT layout from the DxeIplPeim. For example, the protected mode entry code and (where appropriate) the long mode entry code in the UefiCpuPkg/PiSmmCpuDxeSmm/*/MpFuncs.* assembly files, which are used during S3 resume, open-code segment selector values that depend on DxeIplPeim's GDT layout. This updates the CpuDxe module to use the same GDT layout as the DxeIplPeim. This enables modules that are dispatched after CpuDxe to find, and potentially save and restore, a GDT layout that matches that of DxeIplPeim. The DxeIplPeim has a 2 GDT entries for data selectors that are identical. These are LINEAR_SEL (GDT Offset 0x08)and LINEAR_DATA64_SEL (GDT offset 0x30). LINEAL_SEL is used for for IA32 DXE and the LINEAR_DATA64_SEL is used for X64 DXE. This duplicate data selector was added to the CpuDxe module to keep the GDT and all selectors consistent. Using a consistent GDT also improves debug experience. Reported-by: Laszlo Ersek <lersek@redhat.com> Analyzed-by: Laszlo Ersek <lersek@redhat.com> Link: http://article.gmane.org/gmane.comp.bios.edk2.devel/3568 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18710 6f19259b-4bc3-4df7-8a09-765794883524
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#define CPU_DATA_SEL LINEAR_DATA64_SEL
#else
#error CPU type not supported for CPU GDT initialization!
#endif
#endif // _CPU_GDT_H_