mirror of https://github.com/acidanthera/audk.git
780 lines
26 KiB
C
780 lines
26 KiB
C
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/** @file
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Page table management support.
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Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <Base.h>
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#include <Uefi.h>
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#include <Library/BaseLib.h>
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#include <Library/CpuLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/DebugLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Protocol/MpService.h>
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#include "CpuPageTable.h"
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///
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/// Page Table Entry
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///
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#define IA32_PG_P BIT0
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#define IA32_PG_RW BIT1
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#define IA32_PG_U BIT2
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#define IA32_PG_WT BIT3
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#define IA32_PG_CD BIT4
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#define IA32_PG_A BIT5
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#define IA32_PG_D BIT6
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#define IA32_PG_PS BIT7
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#define IA32_PG_PAT_2M BIT12
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#define IA32_PG_PAT_4K IA32_PG_PS
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#define IA32_PG_PMNT BIT62
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#define IA32_PG_NX BIT63
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#define PAGE_ATTRIBUTE_BITS (IA32_PG_D | IA32_PG_A | IA32_PG_U | IA32_PG_RW | IA32_PG_P)
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//
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// Bits 1, 2, 5, 6 are reserved in the IA32 PAE PDPTE
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// X64 PAE PDPTE does not have such restriction
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//
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#define IA32_PAE_PDPTE_ATTRIBUTE_BITS (IA32_PG_P)
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#define PAGE_PROGATE_BITS (IA32_PG_NX | PAGE_ATTRIBUTE_BITS)
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#define PAGING_4K_MASK 0xFFF
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#define PAGING_2M_MASK 0x1FFFFF
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#define PAGING_1G_MASK 0x3FFFFFFF
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#define PAGING_PAE_INDEX_MASK 0x1FF
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#define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull
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#define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull
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#define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
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typedef enum {
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PageNone,
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Page4K,
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Page2M,
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Page1G,
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} PAGE_ATTRIBUTE;
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typedef struct {
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PAGE_ATTRIBUTE Attribute;
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UINT64 Length;
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UINT64 AddressMask;
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} PAGE_ATTRIBUTE_TABLE;
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typedef enum {
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PageActionAssign,
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PageActionSet,
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PageActionClear,
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} PAGE_ACTION;
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PAGE_ATTRIBUTE_TABLE mPageAttributeTable[] = {
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{Page4K, SIZE_4KB, PAGING_4K_ADDRESS_MASK_64},
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{Page2M, SIZE_2MB, PAGING_2M_ADDRESS_MASK_64},
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{Page1G, SIZE_1GB, PAGING_1G_ADDRESS_MASK_64},
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};
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/**
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Enable write protection function for AP.
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@param[in,out] Buffer The pointer to private data buffer.
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**/
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VOID
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EFIAPI
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SyncCpuEnableWriteProtection (
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IN OUT VOID *Buffer
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)
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{
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AsmWriteCr0 (AsmReadCr0 () | BIT16);
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}
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/**
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CpuFlushTlb function for AP.
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@param[in,out] Buffer The pointer to private data buffer.
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**/
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VOID
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EFIAPI
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SyncCpuFlushTlb (
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IN OUT VOID *Buffer
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)
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{
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CpuFlushTlb();
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}
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/**
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Sync memory page attributes for AP.
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@param[in] Procedure A pointer to the function to be run on enabled APs of
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the system.
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**/
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VOID
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SyncMemoryPageAttributesAp (
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IN EFI_AP_PROCEDURE Procedure
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)
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{
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EFI_STATUS Status;
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EFI_MP_SERVICES_PROTOCOL *MpService;
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Status = gBS->LocateProtocol (
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&gEfiMpServiceProtocolGuid,
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NULL,
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(VOID **)&MpService
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);
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//
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// Synchronize the update with all APs
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//
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if (!EFI_ERROR (Status)) {
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Status = MpService->StartupAllAPs (
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MpService, // This
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Procedure, // Procedure
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FALSE, // SingleThread
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NULL, // WaitEvent
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0, // TimeoutInMicrosecsond
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NULL, // ProcedureArgument
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NULL // FailedCpuList
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);
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ASSERT (Status == EFI_SUCCESS || Status == EFI_NOT_STARTED || Status == EFI_NOT_READY);
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}
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}
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/**
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Return current paging context.
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@param[in,out] PagingContext The paging context.
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**/
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VOID
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GetCurrentPagingContext (
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IN OUT PAGE_TABLE_LIB_PAGING_CONTEXT *PagingContext
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)
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{
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UINT32 RegEax;
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UINT32 RegEdx;
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ZeroMem(PagingContext, sizeof(*PagingContext));
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if (sizeof(UINTN) == sizeof(UINT64)) {
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PagingContext->MachineType = IMAGE_FILE_MACHINE_X64;
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} else {
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PagingContext->MachineType = IMAGE_FILE_MACHINE_I386;
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}
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if ((AsmReadCr0 () & BIT31) != 0) {
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PagingContext->ContextData.X64.PageTableBase = (AsmReadCr3 () & PAGING_4K_ADDRESS_MASK_64);
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if ((AsmReadCr0 () & BIT16) == 0) {
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AsmWriteCr0 (AsmReadCr0 () | BIT16);
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SyncMemoryPageAttributesAp (SyncCpuEnableWriteProtection);
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}
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} else {
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PagingContext->ContextData.X64.PageTableBase = 0;
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}
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if ((AsmReadCr4 () & BIT4) != 0) {
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PagingContext->ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PSE;
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}
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if ((AsmReadCr4 () & BIT5) != 0) {
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PagingContext->ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PAE;
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}
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if ((AsmReadCr0 () & BIT16) != 0) {
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PagingContext->ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_WP_ENABLE;
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}
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AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
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if (RegEax > 0x80000000) {
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AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);
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if ((RegEdx & BIT20) != 0) {
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// XD supported
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if ((AsmReadMsr64 (0x000001A0) & BIT34) == 0) {
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// XD enabled
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if ((AsmReadMsr64 (0xC0000080) & BIT11) != 0) {
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// XD activated
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PagingContext->ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED;
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}
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}
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}
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if ((RegEdx & BIT26) != 0) {
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PagingContext->ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PAGE_1G_SUPPORT;
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}
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}
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}
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/**
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Return length according to page attributes.
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@param[in] PageAttributes The page attribute of the page entry.
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@return The length of page entry.
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**/
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UINTN
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PageAttributeToLength (
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IN PAGE_ATTRIBUTE PageAttribute
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)
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{
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UINTN Index;
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for (Index = 0; Index < sizeof(mPageAttributeTable)/sizeof(mPageAttributeTable[0]); Index++) {
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if (PageAttribute == mPageAttributeTable[Index].Attribute) {
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return (UINTN)mPageAttributeTable[Index].Length;
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}
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}
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return 0;
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}
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/**
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Return address mask according to page attributes.
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@param[in] PageAttributes The page attribute of the page entry.
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@return The address mask of page entry.
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**/
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UINTN
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PageAttributeToMask (
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IN PAGE_ATTRIBUTE PageAttribute
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)
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{
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UINTN Index;
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for (Index = 0; Index < sizeof(mPageAttributeTable)/sizeof(mPageAttributeTable[0]); Index++) {
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if (PageAttribute == mPageAttributeTable[Index].Attribute) {
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return (UINTN)mPageAttributeTable[Index].AddressMask;
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}
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}
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return 0;
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}
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/**
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Return page table entry to match the address.
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@param[in] PagingContext The paging context.
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@param[in] Address The address to be checked.
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@param[out] PageAttributes The page attribute of the page entry.
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@return The page entry.
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**/
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VOID *
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GetPageTableEntry (
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IN PAGE_TABLE_LIB_PAGING_CONTEXT *PagingContext,
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IN PHYSICAL_ADDRESS Address,
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OUT PAGE_ATTRIBUTE *PageAttribute
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)
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{
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UINTN Index1;
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UINTN Index2;
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UINTN Index3;
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UINTN Index4;
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UINT64 *L1PageTable;
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UINT64 *L2PageTable;
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UINT64 *L3PageTable;
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UINT64 *L4PageTable;
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ASSERT (PagingContext != NULL);
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Index4 = ((UINTN)RShiftU64 (Address, 39)) & PAGING_PAE_INDEX_MASK;
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Index3 = ((UINTN)Address >> 30) & PAGING_PAE_INDEX_MASK;
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Index2 = ((UINTN)Address >> 21) & PAGING_PAE_INDEX_MASK;
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Index1 = ((UINTN)Address >> 12) & PAGING_PAE_INDEX_MASK;
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if (PagingContext->MachineType == IMAGE_FILE_MACHINE_X64) {
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L4PageTable = (UINT64 *)(UINTN)PagingContext->ContextData.X64.PageTableBase;
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if (L4PageTable[Index4] == 0) {
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*PageAttribute = PageNone;
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return NULL;
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}
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L3PageTable = (UINT64 *)(UINTN)(L4PageTable[Index4] & PAGING_4K_ADDRESS_MASK_64);
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} else {
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ASSERT((PagingContext->ContextData.Ia32.Attributes & PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PAE) != 0);
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L3PageTable = (UINT64 *)(UINTN)PagingContext->ContextData.Ia32.PageTableBase;
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}
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if (L3PageTable[Index3] == 0) {
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*PageAttribute = PageNone;
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return NULL;
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}
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if ((L3PageTable[Index3] & IA32_PG_PS) != 0) {
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// 1G
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*PageAttribute = Page1G;
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return &L3PageTable[Index3];
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}
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L2PageTable = (UINT64 *)(UINTN)(L3PageTable[Index3] & PAGING_4K_ADDRESS_MASK_64);
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if (L2PageTable[Index2] == 0) {
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*PageAttribute = PageNone;
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return NULL;
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}
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if ((L2PageTable[Index2] & IA32_PG_PS) != 0) {
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// 2M
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*PageAttribute = Page2M;
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return &L2PageTable[Index2];
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}
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// 4k
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L1PageTable = (UINT64 *)(UINTN)(L2PageTable[Index2] & PAGING_4K_ADDRESS_MASK_64);
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if ((L1PageTable[Index1] == 0) && (Address != 0)) {
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*PageAttribute = PageNone;
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return NULL;
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}
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*PageAttribute = Page4K;
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return &L1PageTable[Index1];
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}
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/**
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Return memory attributes of page entry.
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@param[in] PageEntry The page entry.
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@return Memory attributes of page entry.
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**/
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UINT64
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GetAttributesFromPageEntry (
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IN UINT64 *PageEntry
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)
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{
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UINT64 Attributes;
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Attributes = 0;
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if ((*PageEntry & IA32_PG_P) == 0) {
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Attributes |= EFI_MEMORY_RP;
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}
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if ((*PageEntry & IA32_PG_RW) == 0) {
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Attributes |= EFI_MEMORY_RO;
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}
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if ((*PageEntry & IA32_PG_NX) != 0) {
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Attributes |= EFI_MEMORY_XP;
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}
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return Attributes;
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}
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/**
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Modify memory attributes of page entry.
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@param[in] PagingContext The paging context.
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@param[in] PageEntry The page entry.
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@param[in] Attributes The bit mask of attributes to modify for the memory region.
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@param[in] PageAction The page action.
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@param[out] IsModified TRUE means page table modified. FALSE means page table not modified.
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**/
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VOID
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ConvertPageEntryAttribute (
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IN PAGE_TABLE_LIB_PAGING_CONTEXT *PagingContext,
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IN UINT64 *PageEntry,
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IN UINT64 Attributes,
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IN PAGE_ACTION PageAction,
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OUT BOOLEAN *IsModified
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)
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{
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UINT64 CurrentPageEntry;
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UINT64 NewPageEntry;
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CurrentPageEntry = *PageEntry;
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NewPageEntry = CurrentPageEntry;
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|
|
if ((Attributes & EFI_MEMORY_RP) != 0) {
|
||
|
|
switch (PageAction) {
|
||
|
|
case PageActionAssign:
|
||
|
|
case PageActionSet:
|
||
|
|
NewPageEntry &= ~(UINT64)IA32_PG_P;
|
||
|
|
break;
|
||
|
|
case PageActionClear:
|
||
|
|
NewPageEntry |= IA32_PG_P;
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
} else {
|
||
|
|
switch (PageAction) {
|
||
|
|
case PageActionAssign:
|
||
|
|
NewPageEntry |= IA32_PG_P;
|
||
|
|
break;
|
||
|
|
case PageActionSet:
|
||
|
|
case PageActionClear:
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
if ((Attributes & EFI_MEMORY_RO) != 0) {
|
||
|
|
switch (PageAction) {
|
||
|
|
case PageActionAssign:
|
||
|
|
case PageActionSet:
|
||
|
|
NewPageEntry &= ~(UINT64)IA32_PG_RW;
|
||
|
|
break;
|
||
|
|
case PageActionClear:
|
||
|
|
NewPageEntry |= IA32_PG_RW;
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
} else {
|
||
|
|
switch (PageAction) {
|
||
|
|
case PageActionAssign:
|
||
|
|
NewPageEntry |= IA32_PG_RW;
|
||
|
|
break;
|
||
|
|
case PageActionSet:
|
||
|
|
case PageActionClear:
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
if ((PagingContext->ContextData.Ia32.Attributes & PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED) != 0) {
|
||
|
|
if ((Attributes & EFI_MEMORY_XP) != 0) {
|
||
|
|
switch (PageAction) {
|
||
|
|
case PageActionAssign:
|
||
|
|
case PageActionSet:
|
||
|
|
NewPageEntry |= IA32_PG_NX;
|
||
|
|
break;
|
||
|
|
case PageActionClear:
|
||
|
|
NewPageEntry &= ~IA32_PG_NX;
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
} else {
|
||
|
|
switch (PageAction) {
|
||
|
|
case PageActionAssign:
|
||
|
|
NewPageEntry &= ~IA32_PG_NX;
|
||
|
|
break;
|
||
|
|
case PageActionSet:
|
||
|
|
case PageActionClear:
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
*PageEntry = NewPageEntry;
|
||
|
|
if (CurrentPageEntry != NewPageEntry) {
|
||
|
|
*IsModified = TRUE;
|
||
|
|
DEBUG ((DEBUG_INFO, "ConvertPageEntryAttribute 0x%lx", CurrentPageEntry));
|
||
|
|
DEBUG ((DEBUG_INFO, "->0x%lx\n", NewPageEntry));
|
||
|
|
} else {
|
||
|
|
*IsModified = FALSE;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
This function returns if there is need to split page entry.
|
||
|
|
|
||
|
|
@param[in] BaseAddress The base address to be checked.
|
||
|
|
@param[in] Length The length to be checked.
|
||
|
|
@param[in] PageEntry The page entry to be checked.
|
||
|
|
@param[in] PageAttribute The page attribute of the page entry.
|
||
|
|
|
||
|
|
@retval SplitAttributes on if there is need to split page entry.
|
||
|
|
**/
|
||
|
|
PAGE_ATTRIBUTE
|
||
|
|
NeedSplitPage (
|
||
|
|
IN PHYSICAL_ADDRESS BaseAddress,
|
||
|
|
IN UINT64 Length,
|
||
|
|
IN UINT64 *PageEntry,
|
||
|
|
IN PAGE_ATTRIBUTE PageAttribute
|
||
|
|
)
|
||
|
|
{
|
||
|
|
UINT64 PageEntryLength;
|
||
|
|
|
||
|
|
PageEntryLength = PageAttributeToLength (PageAttribute);
|
||
|
|
|
||
|
|
if (((BaseAddress & (PageEntryLength - 1)) == 0) && (Length >= PageEntryLength)) {
|
||
|
|
return PageNone;
|
||
|
|
}
|
||
|
|
|
||
|
|
if (((BaseAddress & PAGING_2M_MASK) != 0) || (Length < SIZE_2MB)) {
|
||
|
|
return Page4K;
|
||
|
|
}
|
||
|
|
|
||
|
|
return Page2M;
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
This function splits one page entry to small page entries.
|
||
|
|
|
||
|
|
@param[in] PageEntry The page entry to be splitted.
|
||
|
|
@param[in] PageAttribute The page attribute of the page entry.
|
||
|
|
@param[in] SplitAttribute How to split the page entry.
|
||
|
|
@param[in] AllocatePagesFunc If page split is needed, this function is used to allocate more pages.
|
||
|
|
|
||
|
|
@retval RETURN_SUCCESS The page entry is splitted.
|
||
|
|
@retval RETURN_UNSUPPORTED The page entry does not support to be splitted.
|
||
|
|
@retval RETURN_OUT_OF_RESOURCES No resource to split page entry.
|
||
|
|
**/
|
||
|
|
RETURN_STATUS
|
||
|
|
SplitPage (
|
||
|
|
IN UINT64 *PageEntry,
|
||
|
|
IN PAGE_ATTRIBUTE PageAttribute,
|
||
|
|
IN PAGE_ATTRIBUTE SplitAttribute,
|
||
|
|
IN PAGE_TABLE_LIB_ALLOCATE_PAGES AllocatePagesFunc
|
||
|
|
)
|
||
|
|
{
|
||
|
|
UINT64 BaseAddress;
|
||
|
|
UINT64 *NewPageEntry;
|
||
|
|
UINTN Index;
|
||
|
|
|
||
|
|
ASSERT (PageAttribute == Page2M || PageAttribute == Page1G);
|
||
|
|
|
||
|
|
ASSERT (AllocatePagesFunc != NULL);
|
||
|
|
|
||
|
|
if (PageAttribute == Page2M) {
|
||
|
|
//
|
||
|
|
// Split 2M to 4K
|
||
|
|
//
|
||
|
|
ASSERT (SplitAttribute == Page4K);
|
||
|
|
if (SplitAttribute == Page4K) {
|
||
|
|
NewPageEntry = AllocatePagesFunc (1);
|
||
|
|
DEBUG ((DEBUG_INFO, "Split - 0x%x\n", NewPageEntry));
|
||
|
|
if (NewPageEntry == NULL) {
|
||
|
|
return RETURN_OUT_OF_RESOURCES;
|
||
|
|
}
|
||
|
|
BaseAddress = *PageEntry & PAGING_2M_ADDRESS_MASK_64;
|
||
|
|
for (Index = 0; Index < SIZE_4KB / sizeof(UINT64); Index++) {
|
||
|
|
NewPageEntry[Index] = BaseAddress + SIZE_4KB * Index + ((*PageEntry) & PAGE_PROGATE_BITS);
|
||
|
|
}
|
||
|
|
(*PageEntry) = (UINT64)(UINTN)NewPageEntry + ((*PageEntry) & PAGE_PROGATE_BITS);
|
||
|
|
return RETURN_SUCCESS;
|
||
|
|
} else {
|
||
|
|
return RETURN_UNSUPPORTED;
|
||
|
|
}
|
||
|
|
} else if (PageAttribute == Page1G) {
|
||
|
|
//
|
||
|
|
// Split 1G to 2M
|
||
|
|
// No need support 1G->4K directly, we should use 1G->2M, then 2M->4K to get more compact page table.
|
||
|
|
//
|
||
|
|
ASSERT (SplitAttribute == Page2M || SplitAttribute == Page4K);
|
||
|
|
if ((SplitAttribute == Page2M || SplitAttribute == Page4K)) {
|
||
|
|
NewPageEntry = AllocatePagesFunc (1);
|
||
|
|
DEBUG ((DEBUG_INFO, "Split - 0x%x\n", NewPageEntry));
|
||
|
|
if (NewPageEntry == NULL) {
|
||
|
|
return RETURN_OUT_OF_RESOURCES;
|
||
|
|
}
|
||
|
|
BaseAddress = *PageEntry & PAGING_1G_ADDRESS_MASK_64;
|
||
|
|
for (Index = 0; Index < SIZE_4KB / sizeof(UINT64); Index++) {
|
||
|
|
NewPageEntry[Index] = BaseAddress + SIZE_2MB * Index + IA32_PG_PS + ((*PageEntry) & PAGE_PROGATE_BITS);
|
||
|
|
}
|
||
|
|
(*PageEntry) = (UINT64)(UINTN)NewPageEntry + ((*PageEntry) & PAGE_PROGATE_BITS);
|
||
|
|
return RETURN_SUCCESS;
|
||
|
|
} else {
|
||
|
|
return RETURN_UNSUPPORTED;
|
||
|
|
}
|
||
|
|
} else {
|
||
|
|
return RETURN_UNSUPPORTED;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
This function modifies the page attributes for the memory region specified by BaseAddress and
|
||
|
|
Length from their current attributes to the attributes specified by Attributes.
|
||
|
|
|
||
|
|
Caller should make sure BaseAddress and Length is at page boundary.
|
||
|
|
|
||
|
|
@param[in] PagingContext The paging context. NULL means get page table from current CPU context.
|
||
|
|
@param[in] BaseAddress The physical address that is the start address of a memory region.
|
||
|
|
@param[in] Length The size in bytes of the memory region.
|
||
|
|
@param[in] Attributes The bit mask of attributes to modify for the memory region.
|
||
|
|
@param[in] PageAction The page action.
|
||
|
|
@param[in] AllocatePagesFunc If page split is needed, this function is used to allocate more pages.
|
||
|
|
NULL mean page split is unsupported.
|
||
|
|
@param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.
|
||
|
|
@param[out] IsModified TRUE means page table modified. FALSE means page table not modified.
|
||
|
|
|
||
|
|
@retval RETURN_SUCCESS The attributes were modified for the memory region.
|
||
|
|
@retval RETURN_ACCESS_DENIED The attributes for the memory resource range specified by
|
||
|
|
BaseAddress and Length cannot be modified.
|
||
|
|
@retval RETURN_INVALID_PARAMETER Length is zero.
|
||
|
|
Attributes specified an illegal combination of attributes that
|
||
|
|
cannot be set together.
|
||
|
|
@retval RETURN_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
|
||
|
|
the memory resource range.
|
||
|
|
@retval RETURN_UNSUPPORTED The processor does not support one or more bytes of the memory
|
||
|
|
resource range specified by BaseAddress and Length.
|
||
|
|
The bit mask of attributes is not support for the memory resource
|
||
|
|
range specified by BaseAddress and Length.
|
||
|
|
**/
|
||
|
|
RETURN_STATUS
|
||
|
|
ConvertMemoryPageAttributes (
|
||
|
|
IN PAGE_TABLE_LIB_PAGING_CONTEXT *PagingContext OPTIONAL,
|
||
|
|
IN PHYSICAL_ADDRESS BaseAddress,
|
||
|
|
IN UINT64 Length,
|
||
|
|
IN UINT64 Attributes,
|
||
|
|
IN PAGE_ACTION PageAction,
|
||
|
|
IN PAGE_TABLE_LIB_ALLOCATE_PAGES AllocatePagesFunc OPTIONAL,
|
||
|
|
OUT BOOLEAN *IsSplitted, OPTIONAL
|
||
|
|
OUT BOOLEAN *IsModified OPTIONAL
|
||
|
|
)
|
||
|
|
{
|
||
|
|
PAGE_TABLE_LIB_PAGING_CONTEXT CurrentPagingContext;
|
||
|
|
UINT64 *PageEntry;
|
||
|
|
PAGE_ATTRIBUTE PageAttribute;
|
||
|
|
UINTN PageEntryLength;
|
||
|
|
PAGE_ATTRIBUTE SplitAttribute;
|
||
|
|
RETURN_STATUS Status;
|
||
|
|
BOOLEAN IsEntryModified;
|
||
|
|
|
||
|
|
if ((BaseAddress & (SIZE_4KB - 1)) != 0) {
|
||
|
|
DEBUG ((DEBUG_ERROR, "BaseAddress(0x%lx) is not aligned!\n", BaseAddress));
|
||
|
|
return EFI_UNSUPPORTED;
|
||
|
|
}
|
||
|
|
if ((Length & (SIZE_4KB - 1)) != 0) {
|
||
|
|
DEBUG ((DEBUG_ERROR, "Length(0x%lx) is not aligned!\n", Length));
|
||
|
|
return EFI_UNSUPPORTED;
|
||
|
|
}
|
||
|
|
if (Length == 0) {
|
||
|
|
DEBUG ((DEBUG_ERROR, "Length is 0!\n"));
|
||
|
|
return RETURN_INVALID_PARAMETER;
|
||
|
|
}
|
||
|
|
|
||
|
|
if ((Attributes & ~(EFI_MEMORY_RP | EFI_MEMORY_RO | EFI_MEMORY_XP)) != 0) {
|
||
|
|
DEBUG ((DEBUG_ERROR, "Attributes(0x%lx) has unsupported bit\n", Attributes));
|
||
|
|
return EFI_UNSUPPORTED;
|
||
|
|
}
|
||
|
|
|
||
|
|
if (PagingContext == NULL) {
|
||
|
|
GetCurrentPagingContext (&CurrentPagingContext);
|
||
|
|
} else {
|
||
|
|
CopyMem (&CurrentPagingContext, PagingContext, sizeof(CurrentPagingContext));
|
||
|
|
}
|
||
|
|
switch(CurrentPagingContext.MachineType) {
|
||
|
|
case IMAGE_FILE_MACHINE_I386:
|
||
|
|
if (CurrentPagingContext.ContextData.Ia32.PageTableBase == 0) {
|
||
|
|
DEBUG ((DEBUG_ERROR, "PageTable is 0!\n"));
|
||
|
|
if (Attributes == 0) {
|
||
|
|
return EFI_SUCCESS;
|
||
|
|
} else {
|
||
|
|
return EFI_UNSUPPORTED;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
if ((CurrentPagingContext.ContextData.Ia32.Attributes & PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PAE) == 0) {
|
||
|
|
DEBUG ((DEBUG_ERROR, "Non-PAE Paging!\n"));
|
||
|
|
return EFI_UNSUPPORTED;
|
||
|
|
}
|
||
|
|
break;
|
||
|
|
case IMAGE_FILE_MACHINE_X64:
|
||
|
|
ASSERT (CurrentPagingContext.ContextData.X64.PageTableBase != 0);
|
||
|
|
break;
|
||
|
|
default:
|
||
|
|
ASSERT(FALSE);
|
||
|
|
return EFI_UNSUPPORTED;
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
|
||
|
|
// DEBUG ((DEBUG_ERROR, "ConvertMemoryPageAttributes(%x) - %016lx, %016lx, %02lx\n", IsSet, BaseAddress, Length, Attributes));
|
||
|
|
|
||
|
|
if (IsSplitted != NULL) {
|
||
|
|
*IsSplitted = FALSE;
|
||
|
|
}
|
||
|
|
if (IsModified != NULL) {
|
||
|
|
*IsModified = FALSE;
|
||
|
|
}
|
||
|
|
|
||
|
|
//
|
||
|
|
// Below logic is to check 2M/4K page to make sure we donot waist memory.
|
||
|
|
//
|
||
|
|
while (Length != 0) {
|
||
|
|
PageEntry = GetPageTableEntry (&CurrentPagingContext, BaseAddress, &PageAttribute);
|
||
|
|
if (PageEntry == NULL) {
|
||
|
|
return RETURN_UNSUPPORTED;
|
||
|
|
}
|
||
|
|
PageEntryLength = PageAttributeToLength (PageAttribute);
|
||
|
|
SplitAttribute = NeedSplitPage (BaseAddress, Length, PageEntry, PageAttribute);
|
||
|
|
if (SplitAttribute == PageNone) {
|
||
|
|
ConvertPageEntryAttribute (&CurrentPagingContext, PageEntry, Attributes, PageAction, &IsEntryModified);
|
||
|
|
if (IsEntryModified) {
|
||
|
|
if (IsModified != NULL) {
|
||
|
|
*IsModified = TRUE;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
//
|
||
|
|
// Convert success, move to next
|
||
|
|
//
|
||
|
|
BaseAddress += PageEntryLength;
|
||
|
|
Length -= PageEntryLength;
|
||
|
|
} else {
|
||
|
|
if (AllocatePagesFunc == NULL) {
|
||
|
|
return RETURN_UNSUPPORTED;
|
||
|
|
}
|
||
|
|
Status = SplitPage (PageEntry, PageAttribute, SplitAttribute, AllocatePagesFunc);
|
||
|
|
if (RETURN_ERROR (Status)) {
|
||
|
|
return RETURN_UNSUPPORTED;
|
||
|
|
}
|
||
|
|
if (IsSplitted != NULL) {
|
||
|
|
*IsSplitted = TRUE;
|
||
|
|
}
|
||
|
|
if (IsModified != NULL) {
|
||
|
|
*IsModified = TRUE;
|
||
|
|
}
|
||
|
|
//
|
||
|
|
// Just split current page
|
||
|
|
// Convert success in next around
|
||
|
|
//
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
return RETURN_SUCCESS;
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
This function assigns the page attributes for the memory region specified by BaseAddress and
|
||
|
|
Length from their current attributes to the attributes specified by Attributes.
|
||
|
|
|
||
|
|
Caller should make sure BaseAddress and Length is at page boundary.
|
||
|
|
|
||
|
|
Caller need guarentee the TPL <= TPL_NOTIFY, if there is split page request.
|
||
|
|
|
||
|
|
@param[in] PagingContext The paging context. NULL means get page table from current CPU context.
|
||
|
|
@param[in] BaseAddress The physical address that is the start address of a memory region.
|
||
|
|
@param[in] Length The size in bytes of the memory region.
|
||
|
|
@param[in] Attributes The bit mask of attributes to set for the memory region.
|
||
|
|
@param[in] AllocatePagesFunc If page split is needed, this function is used to allocate more pages.
|
||
|
|
NULL mean page split is unsupported.
|
||
|
|
|
||
|
|
@retval RETURN_SUCCESS The attributes were cleared for the memory region.
|
||
|
|
@retval RETURN_ACCESS_DENIED The attributes for the memory resource range specified by
|
||
|
|
BaseAddress and Length cannot be modified.
|
||
|
|
@retval RETURN_INVALID_PARAMETER Length is zero.
|
||
|
|
Attributes specified an illegal combination of attributes that
|
||
|
|
cannot be set together.
|
||
|
|
@retval RETURN_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
|
||
|
|
the memory resource range.
|
||
|
|
@retval RETURN_UNSUPPORTED The processor does not support one or more bytes of the memory
|
||
|
|
resource range specified by BaseAddress and Length.
|
||
|
|
The bit mask of attributes is not support for the memory resource
|
||
|
|
range specified by BaseAddress and Length.
|
||
|
|
**/
|
||
|
|
RETURN_STATUS
|
||
|
|
EFIAPI
|
||
|
|
AssignMemoryPageAttributes (
|
||
|
|
IN PAGE_TABLE_LIB_PAGING_CONTEXT *PagingContext OPTIONAL,
|
||
|
|
IN PHYSICAL_ADDRESS BaseAddress,
|
||
|
|
IN UINT64 Length,
|
||
|
|
IN UINT64 Attributes,
|
||
|
|
IN PAGE_TABLE_LIB_ALLOCATE_PAGES AllocatePagesFunc OPTIONAL
|
||
|
|
)
|
||
|
|
{
|
||
|
|
RETURN_STATUS Status;
|
||
|
|
BOOLEAN IsModified;
|
||
|
|
BOOLEAN IsSplitted;
|
||
|
|
|
||
|
|
// DEBUG((DEBUG_INFO, "AssignMemoryPageAttributes: 0x%lx - 0x%lx (0x%lx)\n", BaseAddress, Length, Attributes));
|
||
|
|
Status = ConvertMemoryPageAttributes (PagingContext, BaseAddress, Length, Attributes, PageActionAssign, AllocatePagesFunc, &IsSplitted, &IsModified);
|
||
|
|
if (!EFI_ERROR(Status)) {
|
||
|
|
if ((PagingContext == NULL) && IsModified) {
|
||
|
|
//
|
||
|
|
// Flush TLB as last step
|
||
|
|
//
|
||
|
|
CpuFlushTlb();
|
||
|
|
SyncMemoryPageAttributesAp (SyncCpuFlushTlb);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
return Status;
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
Initialize the Page Table lib.
|
||
|
|
**/
|
||
|
|
VOID
|
||
|
|
InitializePageTableLib (
|
||
|
|
VOID
|
||
|
|
)
|
||
|
|
{
|
||
|
|
PAGE_TABLE_LIB_PAGING_CONTEXT CurrentPagingContext;
|
||
|
|
|
||
|
|
GetCurrentPagingContext (&CurrentPagingContext);
|
||
|
|
DEBUG ((DEBUG_INFO, "CurrentPagingContext:\n", CurrentPagingContext.MachineType));
|
||
|
|
DEBUG ((DEBUG_INFO, " MachineType - 0x%x\n", CurrentPagingContext.MachineType));
|
||
|
|
DEBUG ((DEBUG_INFO, " PageTableBase - 0x%x\n", CurrentPagingContext.ContextData.X64.PageTableBase));
|
||
|
|
DEBUG ((DEBUG_INFO, " Attributes - 0x%x\n", CurrentPagingContext.ContextData.X64.Attributes));
|
||
|
|
|
||
|
|
return ;
|
||
|
|
}
|
||
|
|
|