mirror of https://github.com/acidanthera/audk.git
332 lines
8.5 KiB
C
332 lines
8.5 KiB
C
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/*++
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Copyright (c) 2007, Intel Corporation
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Module Name:
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Atapi.h
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Abstract:
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Revision History
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--*/
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#ifndef _ATAPI_H
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#define _ATAPI_H
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#include "Tiano.h"
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#pragma pack(1)
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typedef struct {
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UINT16 config; /* General Configuration */
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UINT16 cylinders; /* Number of Cylinders */
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UINT16 reserved_2;
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UINT16 heads; /* Number of logical heads */
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UINT16 vendor_data1;
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UINT16 vendoe_data2;
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UINT16 sectors_per_track;
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UINT16 vendor_specific_7_9[3];
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CHAR8 SerialNo[20]; /* ASCII */
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UINT16 vendor_specific_20_21[2];
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UINT16 ecc_bytes_available;
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CHAR8 FirmwareVer[8]; /* ASCII */
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CHAR8 ModelName[40]; /* ASCII */
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UINT16 multi_sector_cmd_max_sct_cnt;
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UINT16 reserved_48;
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UINT16 capabilities;
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UINT16 reserved_50;
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UINT16 pio_cycle_timing;
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UINT16 reserved_52;
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UINT16 field_validity;
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UINT16 current_cylinders;
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UINT16 current_heads;
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UINT16 current_sectors;
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UINT16 CurrentCapacityLsb;
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UINT16 CurrentCapacityMsb;
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UINT16 reserved_59;
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UINT16 user_addressable_sectors_lo;
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UINT16 user_addressable_sectors_hi;
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UINT16 reserved_62;
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UINT16 multi_word_dma_mode;
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UINT16 advanced_pio_modes;
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UINT16 min_multi_word_dma_cycle_time;
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UINT16 rec_multi_word_dma_cycle_time;
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UINT16 min_pio_cycle_time_without_flow_control;
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UINT16 min_pio_cycle_time_with_flow_control;
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UINT16 reserved_69_79[11];
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UINT16 major_version_no;
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UINT16 minor_version_no;
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UINT16 reserved_82_127[46];
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UINT16 security_status;
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UINT16 vendor_data_129_159[31];
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UINT16 reserved_160_255[96];
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} IDENTIFY;
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typedef struct {
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UINT8 peripheral_type;
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UINT8 RMB;
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UINT8 version;
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UINT8 response_data_format;
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UINT8 addnl_length;
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UINT8 reserved_5;
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UINT8 reserved_6;
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UINT8 reserved_7;
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UINT8 vendor_info[8];
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UINT8 product_id[12];
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UINT8 eeprom_product_code[4];
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UINT8 firmware_rev_level[4];
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UINT8 firmware_sub_rev_level[1];
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UINT8 reserved_37;
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UINT8 reserved_38;
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UINT8 reserved_39;
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UINT8 max_capacity_hi;
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UINT8 max_capacity_mid;
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UINT8 max_capacity_lo;
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UINT8 reserved_43_95[95 - 43 + 1];
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UINT8 vendor_id[20];
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UINT8 eeprom_drive_sno[12];
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} INQUIRY_DATA;
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typedef struct {
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UINT8 error_code : 7;
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UINT8 valid : 1;
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UINT8 reserved_1;
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UINT8 sense_key : 4;
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UINT8 reserved_21 : 1;
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UINT8 ILI : 1;
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UINT8 reserved_22 : 2;
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UINT8 vendor_specific_3;
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UINT8 vendor_specific_4;
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UINT8 vendor_specific_5;
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UINT8 vendor_specific_6;
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UINT8 addnl_sense_length; // n - 7
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UINT8 vendor_specific_8;
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UINT8 vendor_specific_9;
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UINT8 vendor_specific_10;
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UINT8 vendor_specific_11;
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UINT8 addnl_sense_code; // mandatory
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UINT8 addnl_sense_code_qualifier; // mandatory
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UINT8 field_replaceable_unit_code; // optional
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UINT8 reserved_15;
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UINT8 reserved_16;
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UINT8 reserved_17;
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//
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// Followed by additional sense bytes : FIXME
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//
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} REQUEST_SENSE_DATA;
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typedef struct {
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UINT8 LastLba3;
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UINT8 LastLba2;
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UINT8 LastLba1;
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UINT8 LastLba0;
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UINT8 BlockSize3;
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UINT8 BlockSize2;
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UINT8 BlockSize1;
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UINT8 BlockSize0;
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} READ_CAPACITY_DATA;
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typedef struct {
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UINT8 reserved_0;
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UINT8 reserved_1;
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UINT8 reserved_2;
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UINT8 Capacity_Length;
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UINT8 LastLba3;
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UINT8 LastLba2;
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UINT8 LastLba1;
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UINT8 LastLba0;
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UINT8 DesCode : 2;
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UINT8 reserved_9 : 6;
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UINT8 BlockSize2;
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UINT8 BlockSize1;
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UINT8 BlockSize0;
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} READ_FORMAT_CAPACITY_DATA;
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#pragma pack()
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//
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// ATAPI Command
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//
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#define ATAPI_SOFT_RESET_CMD 0x08
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#define PACKET_CMD 0xA0
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#define ATAPI_IDENTIFY_DEVICE_CMD 0xA1
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#define ATAPI_SERVICE_CMD 0xA2
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//
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// ATAPI Packet Command
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//
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#pragma pack(1)
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typedef struct {
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UINT8 opcode;
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UINT8 reserved_1;
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UINT8 reserved_2;
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UINT8 reserved_3;
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UINT8 reserved_4;
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UINT8 reserved_5;
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UINT8 reserved_6;
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UINT8 reserved_7;
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UINT8 reserved_8;
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UINT8 reserved_9;
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UINT8 reserved_10;
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UINT8 reserved_11;
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} TEST_UNIT_READY_CMD;
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typedef struct {
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UINT8 opcode;
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UINT8 reserved_1 : 4;
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UINT8 lun : 4;
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UINT8 page_code;
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UINT8 reserved_3;
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UINT8 allocation_length;
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UINT8 reserved_5;
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UINT8 reserved_6;
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UINT8 reserved_7;
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UINT8 reserved_8;
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UINT8 reserved_9;
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UINT8 reserved_10;
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UINT8 reserved_11;
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} INQUIRY_CMD;
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typedef struct {
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UINT8 opcode;
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UINT8 reserved_1 : 4;
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UINT8 lun : 4;
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UINT8 reserved_2;
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UINT8 reserved_3;
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UINT8 allocation_length;
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UINT8 reserved_5;
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UINT8 reserved_6;
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UINT8 reserved_7;
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UINT8 reserved_8;
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UINT8 reserved_9;
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UINT8 reserved_10;
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UINT8 reserved_11;
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} REQUEST_SENSE_CMD;
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typedef struct {
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UINT8 opcode;
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UINT8 reserved_1 : 5;
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UINT8 lun : 3;
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UINT8 Lba0;
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UINT8 Lba1;
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UINT8 Lba2;
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UINT8 Lba3;
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UINT8 reserved_6;
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UINT8 TranLen0;
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UINT8 TranLen1;
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UINT8 reserved_9;
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UINT8 reserved_10;
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UINT8 reserved_11;
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} READ10_CMD;
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typedef struct {
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UINT8 opcode;
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UINT8 reserved_1;
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UINT8 reserved_2;
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UINT8 reserved_3;
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UINT8 reserved_4;
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UINT8 reserved_5;
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UINT8 reserved_6;
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UINT8 allocation_length_hi;
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UINT8 allocation_length_lo;
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UINT8 reserved_9;
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UINT8 reserved_10;
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UINT8 reserved_11;
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} READ_FORMAT_CAP_CMD;
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typedef struct {
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UINT8 peripheral_type;
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UINT8 RMB;
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UINT8 version;
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UINT8 response_data_format;
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UINT8 addnl_length;
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UINT8 reserved_5;
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UINT8 reserved_6;
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UINT8 reserved_7;
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UINT8 vendor_info[8];
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UINT8 product_id[12];
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UINT8 eeprom_product_code[4];
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UINT8 firmware_rev_level[4];
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} USB_INQUIRY_DATA;
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typedef union {
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UINT16 Data16[6];
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TEST_UNIT_READY_CMD TestUnitReady;
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READ10_CMD Read10;
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REQUEST_SENSE_CMD RequestSence;
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INQUIRY_CMD Inquiry;
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READ_FORMAT_CAP_CMD ReadFormatCapacity;
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} ATAPI_PACKET_COMMAND;
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#pragma pack()
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//
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// Packet Command Code
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//
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#define TEST_UNIT_READY 0x00
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#define REQUEST_SENSE 0x03
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#define INQUIRY 0x12
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#define READ_FORMAT_CAPACITY 0x23
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#define READ_CAPACITY 0x25
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#define READ_10 0x28
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#define DEFAULT_CTL (0x0a) // default content of device control register, disable INT
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#define DEFAULT_CMD (0xa0)
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#define MAX_ATAPI_BYTE_COUNT (0xfffe)
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//
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// Sense Key
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//
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#define REQUEST_SENSE_ERROR (0x70)
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#define SK_NO_SENSE (0x0)
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#define SK_RECOVERY_ERROR (0x1)
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#define SK_NOT_READY (0x2)
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#define SK_MEDIUM_ERROR (0x3)
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#define SK_HARDWARE_ERROR (0x4)
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#define SK_ILLEGAL_REQUEST (0x5)
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#define SK_UNIT_ATTENTION (0x6)
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#define SK_DATA_PROTECT (0x7)
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#define SK_BLANK_CHECK (0x8)
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#define SK_VENDOR_SPECIFIC (0x9)
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#define SK_RESERVED_A (0xA)
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#define SK_ABORT (0xB)
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#define SK_RESERVED_C (0xC)
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#define SK_OVERFLOW (0xD)
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#define SK_MISCOMPARE (0xE)
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#define SK_RESERVED_F (0xF)
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//
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// Additional Sense Codes
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//
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#define ASC_NOT_READY (0x04)
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#define ASC_MEDIA_ERR1 (0x10)
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#define ASC_MEDIA_ERR2 (0x11)
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#define ASC_MEDIA_ERR3 (0x14)
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#define ASC_MEDIA_ERR4 (0x30)
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#define ASC_MEDIA_UPSIDE_DOWN (0x06)
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#define ASC_INVALID_CMD (0x20)
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#define ASC_LBA_OUT_OF_RANGE (0x21)
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#define ASC_INVALID_FIELD (0x24)
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#define ASC_WRITE_PROTECTED (0x27)
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#define ASC_MEDIA_CHANGE (0x28)
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#define ASC_RESET (0x29) /* Power On Reset or Bus Reset occurred */
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#define ASC_ILLEGAL_FIELD (0x26)
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#define ASC_NO_MEDIA (0x3A)
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#define ASC_ILLEGAL_MODE_FOR_THIS_TRACK (0x64)
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//
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// Additional Sense Code Qualifier
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//
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#define ASCQ_IN_PROGRESS (0x01)
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#endif
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