2016-05-31 03:52:08 +02:00
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;------------------------------------------------------------------------------
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;
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; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
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2019-04-04 01:06:00 +02:00
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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2016-05-31 03:52:08 +02:00
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;
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; Module Name:
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;
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; CopyMem.nasm
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;
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; Abstract:
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;
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; CopyMem function
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;
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; Notes:
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;
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;------------------------------------------------------------------------------
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DEFAULT REL
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SECTION .text
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;------------------------------------------------------------------------------
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; VOID *
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; EFIAPI
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; InternalMemCopyMem (
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; IN VOID *Destination,
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; IN VOID *Source,
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; IN UINTN Count
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; );
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;------------------------------------------------------------------------------
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global ASM_PFX(InternalMemCopyMem)
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ASM_PFX(InternalMemCopyMem):
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push rsi
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push rdi
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mov rsi, rdx ; rsi <- Source
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mov rdi, rcx ; rdi <- Destination
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lea r9, [rsi + r8 - 1] ; r9 <- Last byte of Source
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cmp rsi, rdi
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mov rax, rdi ; rax <- Destination as return value
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jae .0 ; Copy forward if Source > Destination
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cmp r9, rdi ; Overlapped?
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jae @CopyBackward ; Copy backward if overlapped
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.0:
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xor rcx, rcx
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sub rcx, rdi ; rcx <- -rdi
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and rcx, 15 ; rcx + rsi should be 16 bytes aligned
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jz .1 ; skip if rcx == 0
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cmp rcx, r8
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cmova rcx, r8
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sub r8, rcx
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rep movsb
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.1:
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mov rcx, r8
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and r8, 15
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shr rcx, 4 ; rcx <- # of DQwords to copy
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jz @CopyBytes
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movdqa [rsp + 0x18], xmm0 ; save xmm0 on stack
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.2:
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movdqu xmm0, [rsi] ; rsi may not be 16-byte aligned
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movntdq [rdi], xmm0 ; rdi should be 16-byte aligned
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add rsi, 16
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add rdi, 16
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loop .2
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mfence
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movdqa xmm0, [rsp + 0x18] ; restore xmm0
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jmp @CopyBytes ; copy remaining bytes
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@CopyBackward:
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mov rsi, r9 ; rsi <- Last byte of Source
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lea rdi, [rdi + r8 - 1] ; rdi <- Last byte of Destination
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std
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@CopyBytes:
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mov rcx, r8
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rep movsb
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cld
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pop rdi
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pop rsi
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ret
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