2006-05-17 12:29:44 +02:00
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/// @file
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/// CpuFlushTlb() function for Itanium-based architecture.
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///
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/// Copyright (c) 2006, Intel Corporation
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/// All rights reserved. This program and the accompanying materials
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/// are licensed and made available under the terms and conditions of the BSD License
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/// which accompanies this distribution. The full text of the license may be found at
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/// http://opensource.org/licenses/bsd-license.php
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///
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/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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///
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/// Module Name: CpuFlushTlb.s
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///
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///
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.auto
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.text
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2006-09-25 12:05:26 +02:00
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.globl PalCallStatic
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2006-05-24 07:33:03 +02:00
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.type PalCallStatic, @function
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2006-05-17 12:29:44 +02:00
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.proc CpuFlushTlb
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.type CpuFlushTlb, @function
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CpuFlushTlb::
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2006-06-10 09:16:11 +02:00
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alloc loc0 = ar.pfs, 0, 3, 5, 0
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2006-05-24 07:33:03 +02:00
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mov out0 = 0
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mov out1 = 6
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mov out2 = 0
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mov out3 = 0
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mov loc1 = b0
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2006-06-10 09:16:11 +02:00
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mov out4 = 0
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brl.call.sptk b0 = PalCallStatic
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mov loc2 = psr // save PSR
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2006-05-24 07:33:03 +02:00
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mov ar.pfs = loc0
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extr.u r14 = r10, 32, 32 // r14 <- count1
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2006-06-10 09:16:11 +02:00
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rsm 1 << 14 // Disable interrupts
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2006-05-24 07:33:03 +02:00
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extr.u r15 = r11, 32, 32 // r15 <- stride1
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extr.u r10 = r10, 0, 32 // r10 <- count2
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2006-06-10 09:16:11 +02:00
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add r10 = -1, r10
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extr.u r11 = r11, 0, 32 // r11 <- stride2
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br.cond.sptk LoopPredicate
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LoopOuter:
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mov ar.lc = r10 // LC <- count2
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mov ar.ec = r0 // EC <- 0
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Loop:
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ptc.e r9
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add r9 = r11, r9 // r9 += stride2
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br.ctop.sptk Loop
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add r9 = r15, r9 // r9 += stride1
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LoopPredicate:
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cmp.ne p6 = r0, r14 // count1 == 0?
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2006-05-24 07:33:03 +02:00
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add r14 = -1, r14
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(p6) br.cond.sptk LoopOuter
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2006-06-10 09:16:11 +02:00
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mov psr.l = loc2
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mov b0 = loc1
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2006-05-17 12:29:44 +02:00
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br.ret.sptk.many b0
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.endp
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