2013-07-29 11:55:38 +02:00
|
|
|
#------------------------------------------------------------------------------
|
|
|
|
#
|
|
|
|
# CpuBreakpoint() for AArch64
|
|
|
|
#
|
|
|
|
# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
|
|
|
|
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
|
|
|
# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
|
2019-04-04 01:06:00 +02:00
|
|
|
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
2013-07-29 11:55:38 +02:00
|
|
|
#
|
|
|
|
#------------------------------------------------------------------------------
|
|
|
|
|
|
|
|
.text
|
|
|
|
.p2align 2
|
2015-07-09 12:43:27 +02:00
|
|
|
GCC_ASM_EXPORT(CpuBreakpoint)
|
2013-07-29 11:55:38 +02:00
|
|
|
|
|
|
|
#/**
|
|
|
|
# Generates a breakpoint on the CPU.
|
|
|
|
#
|
|
|
|
# Generates a breakpoint on the CPU. The breakpoint must be implemented such
|
|
|
|
# that code can resume normal execution after the breakpoint.
|
|
|
|
#
|
|
|
|
#**/
|
|
|
|
#VOID
|
|
|
|
#EFIAPI
|
|
|
|
#CpuBreakpoint (
|
|
|
|
# VOID
|
|
|
|
# );
|
|
|
|
#
|
|
|
|
ASM_PFX(CpuBreakpoint):
|
|
|
|
svc 0xdbdb // Superviser exception. Takes 16bit arg -> Armv7 had 'swi' here.
|
|
|
|
ret
|