mirror of https://github.com/acidanthera/audk.git
116 lines
3.1 KiB
C
116 lines
3.1 KiB
C
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/**@file
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Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Module Name:
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MemoryInit.c
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Abstract:
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PEIM to provide fake memory init
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**/
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//
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// The package level header files this module uses
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//
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#include <PiPei.h>
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//
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// The protocols, PPI and GUID defintions for this module
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//
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//
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// The Library classes this module consumes
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//
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#include <Library/DebugLib.h>
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#include <Library/PeimEntryPoint.h>
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#include <Library/PcdLib.h>
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#include <Library/HobLib.h>
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#include <Library/ArmLib.h>
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//
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// Module globals
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//
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#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
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#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
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VOID
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JamArmMmuConfig ( VOID )
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{
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UINT32 CacheAttributes;
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ARM_MEMORY_REGION_DESCRIPTOR MemoryTable[3];
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VOID *TranslationTableBase;
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UINTN TranslationTableSize;
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if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
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CacheAttributes = DDR_ATTRIBUTES_CACHED;
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} else {
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CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
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}
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// DDR
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MemoryTable[0].PhysicalBase = 0;
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MemoryTable[0].VirtualBase = 0;
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MemoryTable[0].Length = 0x10000000;
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MemoryTable[0].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;
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// SOC Registers. L3 interconnects
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MemoryTable[1].PhysicalBase = 0x10000000;
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MemoryTable[1].VirtualBase = 0x10000000;
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MemoryTable[1].Length = 0xF0000000;
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MemoryTable[1].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
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// End of Table
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MemoryTable[2].PhysicalBase = 0;
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MemoryTable[2].VirtualBase = 0;
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MemoryTable[2].Length = 0;
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MemoryTable[2].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
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ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
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BuildMemoryAllocationHob((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);
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}
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EFI_STATUS
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EFIAPI
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InitializeCpuPeim (
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IN EFI_PEI_FILE_HANDLE FileHandle,
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IN CONST EFI_PEI_SERVICES **PeiServices
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)
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/*++
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Routine Description:
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Arguments:
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FileHandle - Handle of the file being invoked.
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PeiServices - Describes the list of possible PEI Services.
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Returns:
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Status - EFI_SUCCESS if the boot mode could be set
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--*/
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{
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// Enable program flow prediction, if supported.
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ArmEnableBranchPrediction ();
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JamArmMmuConfig();
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return EFI_SUCCESS;
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}
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