2020-02-26 23:11:46 +01:00
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/** @file
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Root SMI handler for VCPU hotplug SMIs.
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Copyright (c) 2020, Red Hat, Inc.
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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2020-02-26 23:11:50 +01:00
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#include <CpuHotPlugData.h> // CPU_HOT_PLUG_DATA
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2020-02-26 23:11:46 +01:00
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#include <IndustryStandard/Q35MchIch9.h> // ICH9_APM_CNT
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2020-02-26 23:11:48 +01:00
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#include <IndustryStandard/QemuCpuHotplug.h> // QEMU_CPUHP_CMD_GET_PENDING
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2020-02-26 23:11:46 +01:00
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#include <Library/BaseLib.h> // CpuDeadLoop()
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#include <Library/DebugLib.h> // ASSERT()
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#include <Library/MmServicesTableLib.h> // gMmst
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#include <Library/PcdLib.h> // PcdGetBool()
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2020-02-26 23:11:50 +01:00
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#include <Library/SafeIntLib.h> // SafeUintnSub()
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2020-02-26 23:11:46 +01:00
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#include <Protocol/MmCpuIo.h> // EFI_MM_CPU_IO_PROTOCOL
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2020-02-26 23:11:50 +01:00
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#include <Protocol/SmmCpuService.h> // EFI_SMM_CPU_SERVICE_PROTOCOL
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2020-02-26 23:11:46 +01:00
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#include <Uefi/UefiBaseType.h> // EFI_STATUS
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2020-02-26 23:11:50 +01:00
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#include "ApicId.h" // APIC_ID
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2020-02-26 23:11:48 +01:00
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#include "QemuCpuhp.h" // QemuCpuhpWriteCpuSelector()
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2020-02-26 23:11:53 +01:00
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#include "Smbase.h" // SmbaseAllocatePostSmmPen()
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2020-02-26 23:11:48 +01:00
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2020-02-26 23:11:46 +01:00
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//
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// We use this protocol for accessing IO Ports.
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//
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STATIC EFI_MM_CPU_IO_PROTOCOL *mMmCpuIo;
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//
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2020-02-26 23:11:50 +01:00
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// The following protocol is used to report the addition or removal of a CPU to
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// the SMM CPU driver (PiSmmCpuDxeSmm).
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//
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STATIC EFI_SMM_CPU_SERVICE_PROTOCOL *mMmCpuService;
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//
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// This structure is a communication side-channel between the
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// EFI_SMM_CPU_SERVICE_PROTOCOL consumer (i.e., this driver) and provider
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// (i.e., PiSmmCpuDxeSmm).
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//
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STATIC CPU_HOT_PLUG_DATA *mCpuHotPlugData;
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//
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// SMRAM arrays for fetching the APIC IDs of processors with pending events (of
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// known event types), for the time of just one MMI.
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//
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// The lifetimes of these arrays match that of this driver only because we
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// don't want to allocate SMRAM at OS runtime, and potentially fail (or
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// fragment the SMRAM map).
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//
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// These arrays provide room for ("possible CPU count" minus one) APIC IDs
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// each, as we don't expect every possible CPU to appear, or disappear, in a
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// single MMI. The numbers of used (populated) elements in the arrays are
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// determined on every MMI separately.
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//
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STATIC APIC_ID *mPluggedApicIds;
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STATIC APIC_ID *mToUnplugApicIds;
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//
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2020-02-26 23:11:53 +01:00
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// Address of the non-SMRAM reserved memory page that contains the Post-SMM Pen
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// for hot-added CPUs.
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//
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STATIC UINT32 mPostSmmPenAddress;
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//
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2020-02-26 23:11:46 +01:00
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// Represents the registration of the CPU Hotplug MMI handler.
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//
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STATIC EFI_HANDLE mDispatchHandle;
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/**
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CPU Hotplug MMI handler function.
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This is a root MMI handler.
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@param[in] DispatchHandle The unique handle assigned to this handler by
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EFI_MM_SYSTEM_TABLE.MmiHandlerRegister().
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@param[in] Context Context passed in by
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EFI_MM_SYSTEM_TABLE.MmiManage(). Due to
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CpuHotplugMmi() being a root MMI handler,
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Context is ASSERT()ed to be NULL.
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@param[in,out] CommBuffer Ignored, due to CpuHotplugMmi() being a root
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MMI handler.
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@param[in,out] CommBufferSize Ignored, due to CpuHotplugMmi() being a root
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MMI handler.
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@retval EFI_SUCCESS The MMI was handled and the MMI
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source was quiesced. When returned
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by a non-root MMI handler,
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EFI_SUCCESS terminates the
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processing of MMI handlers in
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EFI_MM_SYSTEM_TABLE.MmiManage().
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For a root MMI handler (i.e., for
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the present function too),
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EFI_SUCCESS behaves identically to
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EFI_WARN_INTERRUPT_SOURCE_QUIESCED,
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as further root MMI handlers are
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going to be called by
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EFI_MM_SYSTEM_TABLE.MmiManage()
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anyway.
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@retval EFI_WARN_INTERRUPT_SOURCE_QUIESCED The MMI source has been quiesced,
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but other handlers should still
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be called.
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@retval EFI_WARN_INTERRUPT_SOURCE_PENDING The MMI source is still pending,
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and other handlers should still
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be called.
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@retval EFI_INTERRUPT_PENDING The MMI source could not be
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quiesced.
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**/
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STATIC
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EFI_STATUS
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EFIAPI
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CpuHotplugMmi (
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IN EFI_HANDLE DispatchHandle,
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IN CONST VOID *Context OPTIONAL,
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IN OUT VOID *CommBuffer OPTIONAL,
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IN OUT UINTN *CommBufferSize OPTIONAL
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)
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{
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EFI_STATUS Status;
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UINT8 ApmControl;
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2020-02-26 23:11:50 +01:00
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UINT32 PluggedCount;
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UINT32 ToUnplugCount;
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2020-02-26 23:11:53 +01:00
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UINT32 PluggedIdx;
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UINT32 NewSlot;
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2020-02-26 23:11:46 +01:00
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//
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// Assert that we are entering this function due to our root MMI handler
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// registration.
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//
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ASSERT (DispatchHandle == mDispatchHandle);
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//
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// When MmiManage() is invoked to process root MMI handlers, the caller (the
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// MM Core) is expected to pass in a NULL Context. MmiManage() then passes
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// the same NULL Context to individual handlers.
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//
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ASSERT (Context == NULL);
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//
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// Read the MMI command value from the APM Control Port, to see if this is an
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// MMI we should care about.
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//
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Status = mMmCpuIo->Io.Read (mMmCpuIo, MM_IO_UINT8, ICH9_APM_CNT, 1,
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&ApmControl);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "%a: failed to read ICH9_APM_CNT: %r\n", __FUNCTION__,
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Status));
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//
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// We couldn't even determine if the MMI was for us or not.
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//
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goto Fatal;
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}
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if (ApmControl != ICH9_APM_CNT_CPU_HOTPLUG) {
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//
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// The MMI is not for us.
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//
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return EFI_WARN_INTERRUPT_SOURCE_QUIESCED;
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}
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2020-02-26 23:11:50 +01:00
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//
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// Collect the CPUs with pending events.
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//
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Status = QemuCpuhpCollectApicIds (
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mMmCpuIo,
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mCpuHotPlugData->ArrayLength, // PossibleCpuCount
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mCpuHotPlugData->ArrayLength - 1, // ApicIdCount
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mPluggedApicIds,
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&PluggedCount,
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mToUnplugApicIds,
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&ToUnplugCount
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);
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if (EFI_ERROR (Status)) {
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goto Fatal;
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}
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if (ToUnplugCount > 0) {
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DEBUG ((DEBUG_ERROR, "%a: hot-unplug is not supported yet\n",
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__FUNCTION__));
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goto Fatal;
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}
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2020-02-26 23:11:53 +01:00
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//
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// Process hot-added CPUs.
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//
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// The Post-SMM Pen need not be reinstalled multiple times within a single
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// root MMI handling. Even reinstalling once per root MMI is only prudence;
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// in theory installing the pen in the driver's entry point function should
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// suffice.
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//
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SmbaseReinstallPostSmmPen (mPostSmmPenAddress);
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PluggedIdx = 0;
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NewSlot = 0;
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while (PluggedIdx < PluggedCount) {
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APIC_ID NewApicId;
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UINTN NewProcessorNumberByProtocol;
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NewApicId = mPluggedApicIds[PluggedIdx];
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//
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// Find the first empty slot in CPU_HOT_PLUG_DATA.
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//
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while (NewSlot < mCpuHotPlugData->ArrayLength &&
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mCpuHotPlugData->ApicId[NewSlot] != MAX_UINT64) {
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NewSlot++;
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}
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if (NewSlot == mCpuHotPlugData->ArrayLength) {
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DEBUG ((DEBUG_ERROR, "%a: no room for APIC ID " FMT_APIC_ID "\n",
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__FUNCTION__, NewApicId));
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goto Fatal;
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}
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//
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// Store the APIC ID of the new processor to the slot.
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//
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mCpuHotPlugData->ApicId[NewSlot] = NewApicId;
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//
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// Relocate the SMBASE of the new CPU.
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//
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Status = SmbaseRelocate (NewApicId, mCpuHotPlugData->SmBase[NewSlot],
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mPostSmmPenAddress);
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if (EFI_ERROR (Status)) {
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goto RevokeNewSlot;
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}
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//
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// Add the new CPU with EFI_SMM_CPU_SERVICE_PROTOCOL.
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//
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Status = mMmCpuService->AddProcessor (mMmCpuService, NewApicId,
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&NewProcessorNumberByProtocol);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "%a: AddProcessor(" FMT_APIC_ID "): %r\n",
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__FUNCTION__, NewApicId, Status));
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goto RevokeNewSlot;
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}
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DEBUG ((DEBUG_INFO, "%a: hot-added APIC ID " FMT_APIC_ID ", SMBASE 0x%Lx, "
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"EFI_SMM_CPU_SERVICE_PROTOCOL assigned number %Lu\n", __FUNCTION__,
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NewApicId, (UINT64)mCpuHotPlugData->SmBase[NewSlot],
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(UINT64)NewProcessorNumberByProtocol));
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NewSlot++;
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PluggedIdx++;
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}
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2020-02-26 23:11:46 +01:00
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//
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// We've handled this MMI.
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//
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return EFI_SUCCESS;
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2020-02-26 23:11:53 +01:00
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RevokeNewSlot:
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mCpuHotPlugData->ApicId[NewSlot] = MAX_UINT64;
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2020-02-26 23:11:46 +01:00
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Fatal:
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ASSERT (FALSE);
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CpuDeadLoop ();
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//
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// We couldn't handle this MMI.
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//
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return EFI_INTERRUPT_PENDING;
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}
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//
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// Entry point function of this driver.
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//
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EFI_STATUS
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EFIAPI
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CpuHotplugEntry (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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)
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{
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EFI_STATUS Status;
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2020-02-26 23:11:50 +01:00
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UINTN Size;
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2020-02-26 23:11:46 +01:00
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//
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// This module should only be included when SMM support is required.
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//
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ASSERT (FeaturePcdGet (PcdSmmSmramRequire));
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//
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// This driver depends on the dynamically detected "SMRAM at default SMBASE"
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// feature.
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//
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if (!PcdGetBool (PcdQ35SmramAtDefaultSmbase)) {
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return EFI_UNSUPPORTED;
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}
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//
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// Errors from here on are fatal; we cannot allow the boot to proceed if we
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// can't set up this driver to handle CPU hotplug.
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//
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// First, collect the protocols needed later. All of these protocols are
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// listed in our module DEPEX.
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//
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Status = gMmst->MmLocateProtocol (&gEfiMmCpuIoProtocolGuid,
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NULL /* Registration */, (VOID **)&mMmCpuIo);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "%a: locate MmCpuIo: %r\n", __FUNCTION__, Status));
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goto Fatal;
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}
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2020-02-26 23:11:50 +01:00
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Status = gMmst->MmLocateProtocol (&gEfiSmmCpuServiceProtocolGuid,
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NULL /* Registration */, (VOID **)&mMmCpuService);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "%a: locate MmCpuService: %r\n", __FUNCTION__,
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Status));
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goto Fatal;
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}
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//
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// Our DEPEX on EFI_SMM_CPU_SERVICE_PROTOCOL guarantees that PiSmmCpuDxeSmm
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// has pointed PcdCpuHotPlugDataAddress to CPU_HOT_PLUG_DATA in SMRAM.
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//
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mCpuHotPlugData = (VOID *)(UINTN)PcdGet64 (PcdCpuHotPlugDataAddress);
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if (mCpuHotPlugData == NULL) {
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Status = EFI_NOT_FOUND;
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DEBUG ((DEBUG_ERROR, "%a: CPU_HOT_PLUG_DATA: %r\n", __FUNCTION__, Status));
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goto Fatal;
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}
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//
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// If the possible CPU count is 1, there's nothing for this driver to do.
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//
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if (mCpuHotPlugData->ArrayLength == 1) {
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return EFI_UNSUPPORTED;
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}
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//
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// Allocate the data structures that depend on the possible CPU count.
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//
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if (RETURN_ERROR (SafeUintnSub (mCpuHotPlugData->ArrayLength, 1, &Size)) ||
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RETURN_ERROR (SafeUintnMult (sizeof (APIC_ID), Size, &Size))) {
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Status = EFI_ABORTED;
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DEBUG ((DEBUG_ERROR, "%a: invalid CPU_HOT_PLUG_DATA\n", __FUNCTION__));
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goto Fatal;
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}
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Status = gMmst->MmAllocatePool (EfiRuntimeServicesData, Size,
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(VOID **)&mPluggedApicIds);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "%a: MmAllocatePool(): %r\n", __FUNCTION__, Status));
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goto Fatal;
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}
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Status = gMmst->MmAllocatePool (EfiRuntimeServicesData, Size,
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(VOID **)&mToUnplugApicIds);
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if (EFI_ERROR (Status)) {
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|
|
DEBUG ((DEBUG_ERROR, "%a: MmAllocatePool(): %r\n", __FUNCTION__, Status));
|
|
|
|
goto ReleasePluggedApicIds;
|
|
|
|
}
|
2020-02-26 23:11:46 +01:00
|
|
|
|
2020-02-26 23:11:53 +01:00
|
|
|
//
|
|
|
|
// Allocate the Post-SMM Pen for hot-added CPUs.
|
|
|
|
//
|
|
|
|
Status = SmbaseAllocatePostSmmPen (&mPostSmmPenAddress,
|
|
|
|
SystemTable->BootServices);
|
|
|
|
if (EFI_ERROR (Status)) {
|
|
|
|
goto ReleaseToUnplugApicIds;
|
|
|
|
}
|
|
|
|
|
2020-02-26 23:11:48 +01:00
|
|
|
//
|
|
|
|
// Sanity-check the CPU hotplug interface.
|
|
|
|
//
|
|
|
|
// Both of the following features are part of QEMU 5.0, introduced primarily
|
|
|
|
// in commit range 3e08b2b9cb64..3a61c8db9d25:
|
|
|
|
//
|
|
|
|
// (a) the QEMU_CPUHP_CMD_GET_ARCH_ID command of the modern CPU hotplug
|
|
|
|
// interface,
|
|
|
|
//
|
|
|
|
// (b) the "SMRAM at default SMBASE" feature.
|
|
|
|
//
|
|
|
|
// From these, (b) is restricted to 5.0+ machine type versions, while (a)
|
|
|
|
// does not depend on machine type version. Because we ensured the stricter
|
|
|
|
// condition (b) through PcdQ35SmramAtDefaultSmbase above, the (a)
|
|
|
|
// QEMU_CPUHP_CMD_GET_ARCH_ID command must now be available too. While we
|
|
|
|
// can't verify the presence of precisely that command, we can still verify
|
|
|
|
// (sanity-check) that the modern interface is active, at least.
|
|
|
|
//
|
|
|
|
// Consult the "Typical usecases | Detecting and enabling modern CPU hotplug
|
|
|
|
// interface" section in QEMU's "docs/specs/acpi_cpu_hotplug.txt", on the
|
|
|
|
// following.
|
|
|
|
//
|
|
|
|
QemuCpuhpWriteCpuSelector (mMmCpuIo, 0);
|
|
|
|
QemuCpuhpWriteCpuSelector (mMmCpuIo, 0);
|
|
|
|
QemuCpuhpWriteCommand (mMmCpuIo, QEMU_CPUHP_CMD_GET_PENDING);
|
|
|
|
if (QemuCpuhpReadCommandData2 (mMmCpuIo) != 0) {
|
|
|
|
Status = EFI_NOT_FOUND;
|
|
|
|
DEBUG ((DEBUG_ERROR, "%a: modern CPU hotplug interface: %r\n",
|
|
|
|
__FUNCTION__, Status));
|
2020-02-26 23:11:53 +01:00
|
|
|
goto ReleasePostSmmPen;
|
2020-02-26 23:11:48 +01:00
|
|
|
}
|
|
|
|
|
2020-02-26 23:11:46 +01:00
|
|
|
//
|
|
|
|
// Register the handler for the CPU Hotplug MMI.
|
|
|
|
//
|
|
|
|
Status = gMmst->MmiHandlerRegister (
|
|
|
|
CpuHotplugMmi,
|
|
|
|
NULL, // HandlerType: root MMI handler
|
|
|
|
&mDispatchHandle
|
|
|
|
);
|
|
|
|
if (EFI_ERROR (Status)) {
|
|
|
|
DEBUG ((DEBUG_ERROR, "%a: MmiHandlerRegister(): %r\n", __FUNCTION__,
|
|
|
|
Status));
|
2020-02-26 23:11:53 +01:00
|
|
|
goto ReleasePostSmmPen;
|
2020-02-26 23:11:46 +01:00
|
|
|
}
|
|
|
|
|
2020-02-26 23:11:53 +01:00
|
|
|
//
|
|
|
|
// Install the handler for the hot-added CPUs' first SMI.
|
|
|
|
//
|
|
|
|
SmbaseInstallFirstSmiHandler ();
|
|
|
|
|
2020-02-26 23:11:46 +01:00
|
|
|
return EFI_SUCCESS;
|
|
|
|
|
2020-02-26 23:11:53 +01:00
|
|
|
ReleasePostSmmPen:
|
|
|
|
SmbaseReleasePostSmmPen (mPostSmmPenAddress, SystemTable->BootServices);
|
|
|
|
mPostSmmPenAddress = 0;
|
|
|
|
|
2020-02-26 23:11:50 +01:00
|
|
|
ReleaseToUnplugApicIds:
|
|
|
|
gMmst->MmFreePool (mToUnplugApicIds);
|
|
|
|
mToUnplugApicIds = NULL;
|
|
|
|
|
|
|
|
ReleasePluggedApicIds:
|
|
|
|
gMmst->MmFreePool (mPluggedApicIds);
|
|
|
|
mPluggedApicIds = NULL;
|
|
|
|
|
2020-02-26 23:11:46 +01:00
|
|
|
Fatal:
|
|
|
|
ASSERT (FALSE);
|
|
|
|
CpuDeadLoop ();
|
|
|
|
return Status;
|
|
|
|
}
|