2011-09-23 01:08:40 +02:00
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/** @file
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* Main file supporting the SEC Phase on ARM PLatforms
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*
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* Copyright (c) 2011, ARM Limited. All rights reserved.
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*
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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*
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**/
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#ifndef __SEC_H__
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#define __SEC_H__
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#include <Base.h>
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2011-09-27 18:22:09 +02:00
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#include <Library/ArmLib.h>
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#include <Library/ArmCpuLib.h>
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#include <Library/ArmPlatformLib.h>
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2011-09-23 01:08:40 +02:00
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#include <Library/BaseLib.h>
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#include <Library/DebugLib.h>
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2011-09-27 18:22:09 +02:00
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#include <Library/PcdLib.h>
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2011-09-23 01:08:40 +02:00
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#define IS_ALIGNED(Address, Align) (((UINTN)Address & (Align-1)) == 0)
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VOID
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ArmSetupGicNonSecure (
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IN INTN GicDistributorBase,
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IN INTN GicInterruptInterfaceBase
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);
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// Vector Table for Sec Phase
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VOID
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SecVectorTable (
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VOID
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);
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VOID
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NonSecureWaitForFirmware (
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VOID
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);
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VOID
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enter_monitor_mode (
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IN VOID* Stack
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);
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VOID
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return_from_exception (
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IN UINTN NonSecureBase
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);
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VOID
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copy_cpsr_into_spsr (
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VOID
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);
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2011-11-02 00:41:20 +01:00
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VOID
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set_non_secure_mode (
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IN ARM_PROCESSOR_MODE Mode
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);
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2011-09-23 01:08:40 +02:00
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VOID
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SecCommonExceptionEntry (
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IN UINT32 Entry,
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IN UINT32 LR
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);
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#endif
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