mirror of https://github.com/acidanthera/audk.git
656 lines
22 KiB
NASM
656 lines
22 KiB
NASM
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;/** @file
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; Low level x64 routines used by the debug support driver.
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;
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; Copyright (c) 2007 - 2008, Intel Corporation. <BR>
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; All rights reserved. This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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;**/
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EXCPT64_DIVIDE_ERROR EQU 0
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EXCPT64_DEBUG EQU 1
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EXCPT64_NMI EQU 2
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EXCPT64_BREAKPOINT EQU 3
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EXCPT64_OVERFLOW EQU 4
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EXCPT64_BOUND EQU 5
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EXCPT64_INVALID_OPCODE EQU 6
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EXCPT64_DOUBLE_FAULT EQU 8
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EXCPT64_INVALID_TSS EQU 10
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EXCPT64_SEG_NOT_PRESENT EQU 11
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EXCPT64_STACK_FAULT EQU 12
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EXCPT64_GP_FAULT EQU 13
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EXCPT64_PAGE_FAULT EQU 14
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EXCPT64_FP_ERROR EQU 16
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EXCPT64_ALIGNMENT_CHECK EQU 17
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EXCPT64_MACHINE_CHECK EQU 18
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EXCPT64_SIMD EQU 19
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FXSTOR_FLAG EQU 01000000h ; bit cpuid 24 of feature flags
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;; The FXSTOR and FXRSTOR commands are used for saving and restoring the x87,
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;; MMX, SSE, SSE2, etc registers. The initialization of the debugsupport driver
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;; MUST check the CPUID feature flags to see that these instructions are available
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;; and fail to init if they are not.
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;; fxstor [rdi]
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FXSTOR_RDI MACRO
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db 0fh, 0aeh, 00000111y ; mod = 00, reg/op = 000, r/m = 111 = [rdi]
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ENDM
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;; fxrstor [rsi]
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FXRSTOR_RSI MACRO
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db 0fh, 0aeh, 00001110y ; mod = 00, reg/op = 001, r/m = 110 = [rsi]
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ENDM
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data SEGMENT
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public OrigVector, InterruptEntryStub, StubSize, CommonIdtEntry, FxStorSupport
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StubSize dd InterruptEntryStubEnd - InterruptEntryStub
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AppRsp dq 1111111111111111h ; ?
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DebugRsp dq 2222222222222222h ; ?
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ExtraPush dq 3333333333333333h ; ?
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ExceptData dq 4444444444444444h ; ?
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Rflags dq 5555555555555555h ; ?
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OrigVector dq 6666666666666666h ; ?
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;; The declarations below define the memory region that will be used for the debug stack.
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;; The context record will be built by pushing register values onto this stack.
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;; It is imparitive that alignment be carefully managed, since the FXSTOR and
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;; FXRSTOR instructions will GP fault if their memory operand is not 16 byte aligned.
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;;
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;; The stub will switch stacks from the application stack to the debuger stack
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;; and pushes the exception number.
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;;
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;; Then we building the context record on the stack. Since the stack grows down,
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;; we push the fields of the context record from the back to the front. There
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;; are 336 bytes of stack used prior allocating the 512 bytes of stack to be
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;; used as the memory buffer for the fxstor instruction. Therefore address of
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;; the buffer used for the FXSTOR instruction is &Eax - 336 - 512, which
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;; must be 16 byte aligned.
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;;
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;; We carefully locate the stack to make this happen.
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;;
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;; For reference, the context structure looks like this:
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;; struct {
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;; UINT64 ExceptionData;
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;; FX_SAVE_STATE_X64 FxSaveState; // 512 bytes, must be 16 byte aligned
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;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
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;; UINT64 RFlags;
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;; UINT64 Ldtr, Tr;
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;; UINT64 Gdtr[2], Idtr[2];
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;; UINT64 Rip;
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;; UINT64 Gs, Fs, Es, Ds, Cs, Ss;
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;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
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;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
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;; } SYSTEM_CONTEXT_X64; // 64 bit system context record
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align 16
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DebugStackEnd db "DbgStkEnd >>>>>>" ;; 16 byte long string - must be 16 bytes to preserve alignment
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dd 1ffch dup (000000000h) ;; 32K should be enough stack
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;; This allocation is coocked to insure
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;; that the the buffer for the FXSTORE instruction
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;; will be 16 byte aligned also.
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;;
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ExceptionNumber dq ? ;; first entry will be the vector number pushed by the stub
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DebugStackBegin db "<<<< DbgStkBegin" ;; initial debug ESP == DebugStackBegin, set in stub
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data ENDS
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text SEGMENT
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externdef InterruptDistrubutionHub:near
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;------------------------------------------------------------------------------
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; VOID
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; EfiWbinvd (
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; VOID
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; )
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;
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; Abstract: Writeback and invalidate cache
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;
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EfiWbinvd PROC PUBLIC
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wbinvd
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ret
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EfiWbinvd ENDP
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;------------------------------------------------------------------------------
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; BOOLEAN
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; FxStorSupport (
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; void
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; )
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;
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; Abstract: Returns TRUE if FxStor instructions are supported
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;
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FxStorSupport PROC PUBLIC
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;
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; cpuid corrupts rbx which must be preserved per the C calling convention
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;
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push rbx
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mov rax, 1
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cpuid
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mov eax, edx
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and rax, FXSTOR_FLAG
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shr rax, 24
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pop rbx
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ret
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FxStorSupport ENDP
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;------------------------------------------------------------------------------
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; DESCRIPTOR *
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; GetIdtr (
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; void
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; )
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;
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; Abstract: Returns physical address of IDTR
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;
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GetIdtr PROC PUBLIC
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push rbp
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mov rbp, rsp
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sidt QWORD PTR [rbp - 0ah]
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mov rax, QWORD PTR [rbp - 8h]
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mov rsp, rbp
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pop rbp
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ret
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GetIdtr ENDP
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;------------------------------------------------------------------------------
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; BOOLEAN
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; WriteInterruptFlag (
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; BOOLEAN NewState // rcx
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; )
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;
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; Abstract: Programs interrupt flag to the requested state and returns previous
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; state.
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;
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WriteInterruptFlag PROC PUBLIC
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pushfq
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pop rax
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and rax, 200h
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shr rax, 9
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cmp rcx, 0
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jnz EnableIF
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cli
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ret
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EnableIF:
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sti
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ret
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WriteInterruptFlag ENDP
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;------------------------------------------------------------------------------
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; void
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; Vect2Desc (
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; DESCRIPTOR * DestDesc, // rcx
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; void (*Vector) (void) // rdx
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; )
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;
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; Abstract: Encodes an IDT descriptor with the given physical address
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;
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Vect2Desc PROC PUBLIC
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mov rax, rdx
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mov word ptr [rcx], ax ; write bits 15..0 of offset
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mov dx, cs
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mov word ptr [rcx+2], dx ; SYS_CODE_SEL from GDT
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mov word ptr [rcx+4], 0e00h OR 8000h ; type = 386 interrupt gate, present
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shr rax, 16
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mov word ptr [rcx+6], ax ; write bits 31..16 of offset
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shr rax, 16
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mov dword ptr [rcx+8], eax ; write bits 63..32 of offset
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ret
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Vect2Desc ENDP
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;------------------------------------------------------------------------------
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; InterruptEntryStub
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;
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; Abstract: This code is not a function, but is a small piece of code that is
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; copied and fixed up once for each IDT entry that is hooked.
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;
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InterruptEntryStub::
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push 0 ; push vector number - will be modified before installed
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db 0e9h ; jump rel32
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dd 0 ; fixed up to relative address of CommonIdtEntry
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InterruptEntryStubEnd:
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;------------------------------------------------------------------------------
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; CommonIdtEntry
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;
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; Abstract: This code is not a function, but is the common part for all IDT
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; vectors.
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;
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CommonIdtEntry::
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;;
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;; At this point, the stub has saved the current application stack esp into AppRsp
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;; and switched stacks to the debug stack, where it pushed the vector number
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;;
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;; The application stack looks like this:
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;;
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;; ...
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;; (last application stack entry)
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;; [16 bytes alignment, do not care it]
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;; SS from interrupted task
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;; RSP from interrupted task
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;; rflags from interrupted task
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;; CS from interrupted task
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;; RIP from interrupted task
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;; Error code <-------------------- Only present for some exeption types
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;;
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;; Vector Number <----------------- pushed in our IDT Entry
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;;
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;; The stub switched us to the debug stack and pushed the interrupt number.
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;;
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;; Next, construct the context record. It will be build on the debug stack by
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;; pushing the registers in the correct order so as to create the context structure
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;; on the debug stack. The context record must be built from the end back to the
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;; beginning because the stack grows down...
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;
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;; For reference, the context record looks like this:
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;;
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;; typedef
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;; struct {
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;; UINT64 ExceptionData;
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;; FX_SAVE_STATE_X64 FxSaveState;
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;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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;; UINT64 Cr0, Cr2, Cr3, Cr4, Cr8;
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;; UINT64 RFlags;
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;; UINT64 Ldtr, Tr;
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;; UINT64 Gdtr[2], Idtr[2];
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;; UINT64 Rip;
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;; UINT64 Gs, Fs, Es, Ds, Cs, Ss;
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;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
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;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
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;; } SYSTEM_CONTEXT_X64; // 64 bit system context record
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;; NOTE: we save rsp here to prevent compiler put rip reference cause error AppRsp
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push rax
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mov rax, qword ptr [rsp][8] ; save vector number
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mov ExceptionNumber, rax ; save vector number
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pop rax
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add rsp, 8 ; pop vector number
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mov AppRsp, rsp ; save stack top
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mov rsp, offset DebugStackBegin ; switch to debugger stack
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sub rsp, 8 ; leave space for vector number
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;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
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;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
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push r15
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push r14
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push r13
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push r12
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push r11
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push r10
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push r9
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push r8
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push rax
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push rcx
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push rdx
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push rbx
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push rsp
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push rbp
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push rsi
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push rdi
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;; Save interrupt state rflags register...
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pushfq
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pop rax
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mov qword ptr Rflags, rax
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;; We need to determine if any extra data was pushed by the exception, and if so, save it
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;; To do this, we check the exception number pushed by the stub, and cache the
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;; result in a variable since we'll need this again.
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cmp ExceptionNumber, EXCPT64_DOUBLE_FAULT
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jz ExtraPushOne
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cmp ExceptionNumber, EXCPT64_INVALID_TSS
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jz ExtraPushOne
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cmp ExceptionNumber, EXCPT64_SEG_NOT_PRESENT
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jz ExtraPushOne
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cmp ExceptionNumber, EXCPT64_STACK_FAULT
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jz ExtraPushOne
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cmp ExceptionNumber, EXCPT64_GP_FAULT
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jz ExtraPushOne
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cmp ExceptionNumber, EXCPT64_PAGE_FAULT
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jz ExtraPushOne
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cmp ExceptionNumber, EXCPT64_ALIGNMENT_CHECK
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jz ExtraPushOne
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mov ExtraPush, 0
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mov ExceptData, 0
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jmp ExtraPushDone
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ExtraPushOne:
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mov ExtraPush, 1
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;; If there's some extra data, save it also, and modify the saved AppRsp to effectively
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;; pop this value off the application's stack.
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mov rax, AppRsp
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mov rbx, [rax]
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mov ExceptData, rbx
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add rax, 8
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mov AppRsp, rax
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ExtraPushDone:
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;; The "push" above pushed the debug stack rsp. Since what we're actually doing
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;; is building the context record on the debug stack, we need to save the pushed
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;; debug RSP, and replace it with the application's last stack entry...
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mov rax, [rsp + 24]
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mov DebugRsp, rax
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mov rax, AppRsp
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add rax, 40
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; application stack has ss, rsp, rflags, cs, & rip, so
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; last actual application stack entry is
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; 40 bytes into the application stack.
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mov [rsp + 24], rax
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;; continue building context record
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;; UINT64 Gs, Fs, Es, Ds, Cs, Ss; insure high 16 bits of each is zero
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mov rax, ss
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push rax
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; CS from application is one entry back in application stack
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mov rax, AppRsp
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movzx rax, word ptr [rax + 8]
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push rax
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mov rax, ds
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push rax
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mov rax, es
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push rax
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mov rax, fs
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||
|
|
push rax
|
||
|
|
mov rax, gs
|
||
|
|
push rax
|
||
|
|
|
||
|
|
;; UINT64 Rip;
|
||
|
|
; Rip from application is on top of application stack
|
||
|
|
mov rax, AppRsp
|
||
|
|
push qword ptr [rax]
|
||
|
|
|
||
|
|
;; UINT64 Gdtr[2], Idtr[2];
|
||
|
|
push 0
|
||
|
|
push 0
|
||
|
|
sidt fword ptr [rsp]
|
||
|
|
push 0
|
||
|
|
push 0
|
||
|
|
sgdt fword ptr [rsp]
|
||
|
|
|
||
|
|
;; UINT64 Ldtr, Tr;
|
||
|
|
xor rax, rax
|
||
|
|
str ax
|
||
|
|
push rax
|
||
|
|
sldt ax
|
||
|
|
push rax
|
||
|
|
|
||
|
|
;; UINT64 RFlags;
|
||
|
|
;; Rflags from application is two entries back in application stack
|
||
|
|
mov rax, AppRsp
|
||
|
|
push qword ptr [rax + 16]
|
||
|
|
|
||
|
|
;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
|
||
|
|
;; insure FXSAVE/FXRSTOR is enabled in CR4...
|
||
|
|
;; ... while we're at it, make sure DE is also enabled...
|
||
|
|
mov rax, cr8
|
||
|
|
push rax
|
||
|
|
mov rax, cr4
|
||
|
|
or rax, 208h
|
||
|
|
mov cr4, rax
|
||
|
|
push rax
|
||
|
|
mov rax, cr3
|
||
|
|
push rax
|
||
|
|
mov rax, cr2
|
||
|
|
push rax
|
||
|
|
push 0
|
||
|
|
mov rax, cr0
|
||
|
|
push rax
|
||
|
|
|
||
|
|
;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
|
||
|
|
mov rax, dr7
|
||
|
|
push rax
|
||
|
|
;; clear Dr7 while executing debugger itself
|
||
|
|
xor rax, rax
|
||
|
|
mov dr7, rax
|
||
|
|
|
||
|
|
mov rax, dr6
|
||
|
|
push rax
|
||
|
|
;; insure all status bits in dr6 are clear...
|
||
|
|
xor rax, rax
|
||
|
|
mov dr6, rax
|
||
|
|
|
||
|
|
mov rax, dr3
|
||
|
|
push rax
|
||
|
|
mov rax, dr2
|
||
|
|
push rax
|
||
|
|
mov rax, dr1
|
||
|
|
push rax
|
||
|
|
mov rax, dr0
|
||
|
|
push rax
|
||
|
|
|
||
|
|
;; FX_SAVE_STATE_X64 FxSaveState;
|
||
|
|
sub rsp, 512
|
||
|
|
mov rdi, rsp
|
||
|
|
; IMPORTANT!! The debug stack has been carefully constructed to
|
||
|
|
; insure that rsp and rdi are 16 byte aligned when we get here.
|
||
|
|
; They MUST be. If they are not, a GP fault will occur.
|
||
|
|
FXSTOR_RDI
|
||
|
|
|
||
|
|
;; UINT64 ExceptionData;
|
||
|
|
mov rax, ExceptData
|
||
|
|
push rax
|
||
|
|
|
||
|
|
; call to C code which will in turn call registered handler
|
||
|
|
; pass in the vector number
|
||
|
|
mov rdx, rsp
|
||
|
|
mov rcx, ExceptionNumber
|
||
|
|
sub rsp, 40
|
||
|
|
call InterruptDistrubutionHub
|
||
|
|
add rsp, 40
|
||
|
|
|
||
|
|
; restore context...
|
||
|
|
;; UINT64 ExceptionData;
|
||
|
|
add rsp, 8
|
||
|
|
|
||
|
|
;; FX_SAVE_STATE_X64 FxSaveState;
|
||
|
|
mov rsi, rsp
|
||
|
|
FXRSTOR_RSI
|
||
|
|
add rsp, 512
|
||
|
|
|
||
|
|
;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
|
||
|
|
pop rax
|
||
|
|
mov dr0, rax
|
||
|
|
pop rax
|
||
|
|
mov dr1, rax
|
||
|
|
pop rax
|
||
|
|
mov dr2, rax
|
||
|
|
pop rax
|
||
|
|
mov dr3, rax
|
||
|
|
;; skip restore of dr6. We cleared dr6 during the context save.
|
||
|
|
add rsp, 8
|
||
|
|
pop rax
|
||
|
|
mov dr7, rax
|
||
|
|
|
||
|
|
;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
|
||
|
|
pop rax
|
||
|
|
mov cr0, rax
|
||
|
|
add rsp, 8
|
||
|
|
pop rax
|
||
|
|
mov cr2, rax
|
||
|
|
pop rax
|
||
|
|
mov cr3, rax
|
||
|
|
pop rax
|
||
|
|
mov cr4, rax
|
||
|
|
pop rax
|
||
|
|
mov cr8, rax
|
||
|
|
|
||
|
|
;; UINT64 RFlags;
|
||
|
|
mov rax, AppRsp
|
||
|
|
pop qword ptr [rax + 16]
|
||
|
|
|
||
|
|
;; UINT64 Ldtr, Tr;
|
||
|
|
;; UINT64 Gdtr[2], Idtr[2];
|
||
|
|
;; Best not let anyone mess with these particular registers...
|
||
|
|
add rsp, 48
|
||
|
|
|
||
|
|
;; UINT64 Rip;
|
||
|
|
pop qword ptr [rax]
|
||
|
|
|
||
|
|
;; UINT64 Gs, Fs, Es, Ds, Cs, Ss;
|
||
|
|
;; NOTE - modified segment registers could hang the debugger... We
|
||
|
|
;; could attempt to insulate ourselves against this possibility,
|
||
|
|
;; but that poses risks as well.
|
||
|
|
;;
|
||
|
|
|
||
|
|
pop rax
|
||
|
|
; mov gs, rax
|
||
|
|
pop rax
|
||
|
|
; mov fs, rax
|
||
|
|
pop rax
|
||
|
|
mov es, rax
|
||
|
|
pop rax
|
||
|
|
mov ds, rax
|
||
|
|
mov rax, AppRsp
|
||
|
|
pop qword ptr [rax + 8]
|
||
|
|
pop rax
|
||
|
|
mov ss, rax
|
||
|
|
|
||
|
|
;; The next stuff to restore is the general purpose registers that were pushed
|
||
|
|
;; using the "push" instruction.
|
||
|
|
;;
|
||
|
|
;; The value of RSP as stored in the context record is the application RSP
|
||
|
|
;; including the 5 entries on the application stack caused by the exception
|
||
|
|
;; itself. It may have been modified by the debug agent, so we need to
|
||
|
|
;; determine if we need to relocate the application stack.
|
||
|
|
|
||
|
|
mov rbx, [rsp + 24] ; move the potentially modified AppRsp into rbx
|
||
|
|
mov rax, AppRsp
|
||
|
|
add rax, 40
|
||
|
|
cmp rbx, rax
|
||
|
|
je NoAppStackMove
|
||
|
|
|
||
|
|
mov rax, AppRsp
|
||
|
|
mov rcx, [rax] ; RIP
|
||
|
|
mov [rbx], rcx
|
||
|
|
|
||
|
|
mov rcx, [rax + 8] ; CS
|
||
|
|
mov [rbx + 8], rcx
|
||
|
|
|
||
|
|
mov rcx, [rax + 16] ; RFLAGS
|
||
|
|
mov [rbx + 16], rcx
|
||
|
|
|
||
|
|
mov rcx, [rax + 24] ; RSP
|
||
|
|
mov [rbx + 24], rcx
|
||
|
|
|
||
|
|
mov rcx, [rax + 32] ; SS
|
||
|
|
mov [rbx + 32], rcx
|
||
|
|
|
||
|
|
mov rax, rbx ; modify the saved AppRsp to the new AppRsp
|
||
|
|
mov AppRsp, rax
|
||
|
|
NoAppStackMove:
|
||
|
|
mov rax, DebugRsp ; restore the DebugRsp on the debug stack
|
||
|
|
; so our "pop" will not cause a stack switch
|
||
|
|
mov [rsp + 24], rax
|
||
|
|
|
||
|
|
cmp ExceptionNumber, 068h
|
||
|
|
jne NoChain
|
||
|
|
|
||
|
|
Chain:
|
||
|
|
|
||
|
|
;; Restore rflags so when we chain, the flags will be exactly as if we were never here.
|
||
|
|
;; We gin up the stack to do an iretq so we can get ALL the flags.
|
||
|
|
mov rax, AppRsp
|
||
|
|
mov rbx, [rax + 40]
|
||
|
|
push rbx
|
||
|
|
mov rax, ss
|
||
|
|
push rax
|
||
|
|
mov rax, rsp
|
||
|
|
add rax, 16
|
||
|
|
push rax
|
||
|
|
mov rax, AppRsp
|
||
|
|
mov rbx, [rax + 16]
|
||
|
|
and rbx, NOT 300h ; special handling for IF and TF
|
||
|
|
push rbx
|
||
|
|
mov rax, cs
|
||
|
|
push rax
|
||
|
|
mov rax, offset PhonyIretq
|
||
|
|
push rax
|
||
|
|
iretq
|
||
|
|
PhonyIretq:
|
||
|
|
|
||
|
|
;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
|
||
|
|
;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
|
||
|
|
pop rdi
|
||
|
|
pop rsi
|
||
|
|
pop rbp
|
||
|
|
pop rsp
|
||
|
|
pop rbx
|
||
|
|
pop rdx
|
||
|
|
pop rcx
|
||
|
|
pop rax
|
||
|
|
pop r8
|
||
|
|
pop r9
|
||
|
|
pop r10
|
||
|
|
pop r11
|
||
|
|
pop r12
|
||
|
|
pop r13
|
||
|
|
pop r14
|
||
|
|
pop r15
|
||
|
|
|
||
|
|
;; Switch back to application stack
|
||
|
|
mov rsp, AppRsp
|
||
|
|
|
||
|
|
;; Jump to original handler
|
||
|
|
jmp OrigVector
|
||
|
|
|
||
|
|
NoChain:
|
||
|
|
;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
|
||
|
|
;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
|
||
|
|
pop rdi
|
||
|
|
pop rsi
|
||
|
|
pop rbp
|
||
|
|
pop rsp
|
||
|
|
pop rbx
|
||
|
|
pop rdx
|
||
|
|
pop rcx
|
||
|
|
pop rax
|
||
|
|
pop r8
|
||
|
|
pop r9
|
||
|
|
pop r10
|
||
|
|
pop r11
|
||
|
|
pop r12
|
||
|
|
pop r13
|
||
|
|
pop r14
|
||
|
|
pop r15
|
||
|
|
|
||
|
|
;; Switch back to application stack
|
||
|
|
mov rsp, AppRsp
|
||
|
|
|
||
|
|
;; We're outa here...
|
||
|
|
iretq
|
||
|
|
text ENDS
|
||
|
|
|
||
|
|
END
|
||
|
|
|
||
|
|
|
||
|
|
|