2010-02-24 00:58:38 +01:00
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## @file
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2009-05-27 23:10:18 +02:00
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# Open Virtual Machine Firmware: FDF
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#
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2010-04-28 14:43:04 +02:00
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# Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
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2009-05-27 23:10:18 +02:00
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#
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2010-04-28 14:43:04 +02:00
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# This program and the accompanying materials
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2009-05-27 23:10:18 +02:00
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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2010-02-24 00:58:38 +01:00
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##
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2009-05-27 23:10:18 +02:00
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################################################################################
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2010-06-26 00:23:22 +02:00
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[FD.OVMF]
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BaseAddress = 0xFFF00000
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Size = 0x00100000
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2010-01-04 17:17:59 +01:00
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ErasePolarity = 1
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BlockSize = 0x1000
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2010-06-26 00:23:22 +02:00
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NumBlocks = 0x100
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2010-01-04 17:17:59 +01:00
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2010-06-26 00:23:22 +02:00
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0x00000000|0x000EE000
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FV = FVMAIN_COMPACT
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0x000EE000|0x12000
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2010-01-04 17:17:59 +01:00
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FV = SECFV
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2010-06-26 00:23:22 +02:00
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2009-05-27 23:10:18 +02:00
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################################################################################
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2010-01-04 17:17:59 +01:00
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[FD.MEMFD]
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BaseAddress = 0x800000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvBase
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Size = 0x400000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvSize
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2009-05-27 23:10:18 +02:00
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ErasePolarity = 1
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BlockSize = 0x10000
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2010-01-04 17:17:59 +01:00
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NumBlocks = 0x40
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2009-05-27 23:10:18 +02:00
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2010-01-04 17:17:59 +01:00
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0x0|0x400000
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2009-05-27 23:10:18 +02:00
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FV = MAINFV
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################################################################################
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2010-01-04 17:17:59 +01:00
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[FV.SECFV]
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BlockSize = 0x1000
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FvAlignment = 16
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ERASE_POLARITY = 1
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MEMORY_MAPPED = TRUE
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STICKY_WRITE = TRUE
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LOCK_CAP = TRUE
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LOCK_STATUS = TRUE
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WRITE_DISABLED_CAP = TRUE
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WRITE_ENABLED_CAP = TRUE
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WRITE_STATUS = TRUE
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WRITE_LOCK_CAP = TRUE
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WRITE_LOCK_STATUS = TRUE
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READ_DISABLED_CAP = TRUE
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READ_ENABLED_CAP = TRUE
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READ_STATUS = TRUE
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READ_LOCK_CAP = TRUE
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READ_LOCK_STATUS = TRUE
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2009-05-27 23:10:18 +02:00
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#
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2010-01-04 17:17:59 +01:00
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# SEC Phase modules
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2009-05-27 23:10:18 +02:00
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#
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2010-01-04 17:17:59 +01:00
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# The code in this FV handles the initial firmware startup, and
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# decompresses the MAINFV which handles the majority of the boot sequence.
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2009-05-27 23:10:18 +02:00
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#
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2010-01-04 17:17:59 +01:00
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INF OvmfPkg/Sec/SecMain.inf
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2010-07-26 20:07:19 +02:00
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INF RuleOverride=RESET_VECTOR USE = IA32 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
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2010-01-04 17:17:59 +01:00
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2009-05-27 23:10:18 +02:00
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################################################################################
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2010-01-04 17:17:59 +01:00
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[FV.MAINFV]
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BlockSize = 0x10000
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FvAlignment = 16
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2009-05-27 23:10:18 +02:00
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ERASE_POLARITY = 1
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MEMORY_MAPPED = TRUE
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STICKY_WRITE = TRUE
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LOCK_CAP = TRUE
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LOCK_STATUS = TRUE
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WRITE_DISABLED_CAP = TRUE
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WRITE_ENABLED_CAP = TRUE
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WRITE_STATUS = TRUE
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WRITE_LOCK_CAP = TRUE
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WRITE_LOCK_STATUS = TRUE
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READ_DISABLED_CAP = TRUE
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READ_ENABLED_CAP = TRUE
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READ_STATUS = TRUE
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READ_LOCK_CAP = TRUE
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READ_LOCK_STATUS = TRUE
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#
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2010-01-04 17:17:59 +01:00
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# Files to be placed in MAIN FV
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2009-05-27 23:10:18 +02:00
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#
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# This firmware volume will have files placed in it uncompressed,
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# and then then entire firmware volume will be compressed in a
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# single compression operation in order to achieve better
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# overall compression.
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#
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2010-01-04 17:17:59 +01:00
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APRIORI PEI {
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INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
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}
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#
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# PEI Phase modules
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#
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INF MdeModulePkg/Core/Pei/PeiMain.inf
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INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
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INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
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INF OvmfPkg/PlatformPei/PlatformPei.inf
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INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
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2010-03-01 02:59:46 +01:00
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FILE FV_IMAGE = A4EF5A93-3F1B-4232-A1C4-F0910E6D1D9C {
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2010-06-26 00:23:22 +02:00
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SECTION FV_IMAGE = DXEFV
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2010-02-25 22:53:06 +01:00
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}
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################################################################################
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[FV.DXEFV]
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BlockSize = 0x10000
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FvAlignment = 16
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ERASE_POLARITY = 1
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MEMORY_MAPPED = TRUE
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STICKY_WRITE = TRUE
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LOCK_CAP = TRUE
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LOCK_STATUS = TRUE
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WRITE_DISABLED_CAP = TRUE
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WRITE_ENABLED_CAP = TRUE
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WRITE_STATUS = TRUE
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WRITE_LOCK_CAP = TRUE
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WRITE_LOCK_STATUS = TRUE
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READ_DISABLED_CAP = TRUE
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READ_ENABLED_CAP = TRUE
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READ_STATUS = TRUE
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READ_LOCK_CAP = TRUE
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READ_LOCK_STATUS = TRUE
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APRIORI DXE {
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INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
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}
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2009-05-27 23:10:18 +02:00
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#
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# DXE Phase modules
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#
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INF MdeModulePkg/Core/Dxe/DxeMain.inf
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INF IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf
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INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
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INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
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INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
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2010-01-04 17:17:59 +01:00
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INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
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2009-12-20 06:35:58 +01:00
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INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
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2009-05-27 23:10:18 +02:00
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INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
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2009-12-09 03:18:21 +01:00
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INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
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2009-05-27 23:10:18 +02:00
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INF UefiCpuPkg/CpuDxe/CpuDxe.inf
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INF PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
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INF PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf
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2009-10-20 05:44:25 +02:00
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INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
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2009-05-27 23:10:18 +02:00
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INF PcAtChipsetPkg/KbcResetDxe/Reset.inf
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INF MdeModulePkg/Universal/Metronome/Metronome.inf
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2009-07-15 01:32:41 +02:00
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INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
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2009-07-07 06:54:01 +02:00
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2010-03-21 01:34:15 +01:00
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INF OvmfPkg/BlockMmioToBlockIoDxe/BlockIo.inf
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2009-09-26 09:15:51 +02:00
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INF OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.inf
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INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
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INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
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2009-05-27 23:10:18 +02:00
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INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
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INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
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INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
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INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
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INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
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INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
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INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
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INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
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INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
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2009-06-30 17:57:29 +02:00
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INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf
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2009-05-27 23:10:18 +02:00
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INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
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INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
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INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
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INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
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INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
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INF IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/IdeBusDxe.inf
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INF PcAtChipsetPkg/Bus/Pci/IdeControllerDxe/IdeControllerDxe.inf
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INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
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INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
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INF PcAtChipsetPkg/IsaAcpiDxe/IsaAcpi.inf
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INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
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INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
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INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
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INF IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/IsaFloppyDxe.inf
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INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
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INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
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2009-10-07 18:01:09 +02:00
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INF RuleOverride=ACPITABLE OvmfPkg/AcpiTables/AcpiTables.inf
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2010-06-26 00:23:22 +02:00
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INF OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430Dxe.inf
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2009-05-27 23:10:18 +02:00
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2010-06-29 06:55:13 +02:00
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INF RuleOverride = BINARY USE = X64 FatBinPkg/EnhancedFatDxe/Fat.inf
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INF RuleOverride = BINARY USE = X64 EdkShellBinPkg/FullShell/FullShell.inf
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2009-05-27 23:10:18 +02:00
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2009-07-09 07:48:35 +02:00
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FILE FREEFORM = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile) {
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2010-06-26 00:23:22 +02:00
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SECTION RAW = MdeModulePkg/Logo/Logo.bmp
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}
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2010-07-26 20:07:19 +02:00
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#
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# Network modules
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#
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!if $(NETWORK_ENABLE)
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FILE DRIVER = 5D695E11-9B3F-4b83-B25F-4A8D5D69BE07 {
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SECTION PE32 = Intel3.5/EFIX64/E3507X2.EFI
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}
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INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
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INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
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INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
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INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
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INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
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INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
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INF MdeModulePkg/Universal/Network/Ip4ConfigDxe/Ip4ConfigDxe.inf
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INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
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INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
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INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
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INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
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INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
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INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
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!endif
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2010-06-26 00:23:22 +02:00
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2009-05-27 23:10:18 +02:00
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################################################################################
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2010-06-26 00:23:22 +02:00
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[FV.FVMAIN_COMPACT]
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2009-05-27 23:10:18 +02:00
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FvAlignment = 16
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ERASE_POLARITY = 1
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MEMORY_MAPPED = TRUE
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STICKY_WRITE = TRUE
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LOCK_CAP = TRUE
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LOCK_STATUS = TRUE
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WRITE_DISABLED_CAP = TRUE
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WRITE_ENABLED_CAP = TRUE
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WRITE_STATUS = TRUE
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WRITE_LOCK_CAP = TRUE
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WRITE_LOCK_STATUS = TRUE
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READ_DISABLED_CAP = TRUE
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READ_ENABLED_CAP = TRUE
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READ_STATUS = TRUE
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READ_LOCK_CAP = TRUE
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READ_LOCK_STATUS = TRUE
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2010-06-26 00:23:22 +02:00
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FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
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SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
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SECTION FV_IMAGE = MAINFV
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}
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}
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2009-05-27 23:10:18 +02:00
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################################################################################
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[Rule.Common.SEC]
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FILE SEC = $(NAMED_GUID) {
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2010-03-01 07:47:58 +01:00
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PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
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2009-05-27 23:10:18 +02:00
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UI STRING ="$(MODULE_NAME)" Optional
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VERSION STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
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}
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2010-06-26 00:23:22 +02:00
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[Rule.Common.PEI_CORE]
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FILE PEI_CORE = $(NAMED_GUID) {
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PE32 PE32 Align=32 $(INF_OUTPUT)/$(MODULE_NAME).efi
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UI STRING ="$(MODULE_NAME)" Optional
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VERSION STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
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2009-10-07 18:01:09 +02:00
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}
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2009-05-27 23:10:18 +02:00
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[Rule.Common.PEIM]
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FILE PEIM = $(NAMED_GUID) {
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2010-03-01 07:47:58 +01:00
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PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
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PE32 PE32 Align=32 $(INF_OUTPUT)/$(MODULE_NAME).efi
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2009-05-27 23:10:18 +02:00
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UI STRING="$(MODULE_NAME)" Optional
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VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
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}
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[Rule.Common.DXE_CORE]
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FILE DXE_CORE = $(NAMED_GUID) {
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2010-03-01 07:47:58 +01:00
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PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
2009-05-27 23:10:18 +02:00
|
|
|
UI STRING="$(MODULE_NAME)" Optional
|
|
|
|
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
|
|
|
}
|
|
|
|
|
2010-06-26 00:23:22 +02:00
|
|
|
[Rule.Common.DXE_DRIVER]
|
2009-05-27 23:10:18 +02:00
|
|
|
FILE DRIVER = $(NAMED_GUID) {
|
2010-03-01 07:47:58 +01:00
|
|
|
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
|
|
|
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
2009-05-27 23:10:18 +02:00
|
|
|
UI STRING="$(MODULE_NAME)" Optional
|
|
|
|
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
|
|
|
}
|
|
|
|
|
2010-06-26 00:23:22 +02:00
|
|
|
[Rule.Common.DXE_RUNTIME_DRIVER]
|
2009-05-27 23:10:18 +02:00
|
|
|
FILE DRIVER = $(NAMED_GUID) {
|
2010-03-01 07:47:58 +01:00
|
|
|
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
|
|
|
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
2009-05-27 23:10:18 +02:00
|
|
|
UI STRING="$(MODULE_NAME)" Optional
|
|
|
|
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
|
|
|
}
|
|
|
|
|
2010-06-26 00:23:22 +02:00
|
|
|
[Rule.Common.UEFI_DRIVER]
|
2009-05-27 23:10:18 +02:00
|
|
|
FILE DRIVER = $(NAMED_GUID) {
|
2010-03-01 07:47:58 +01:00
|
|
|
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
|
|
|
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
2009-05-27 23:10:18 +02:00
|
|
|
UI STRING="$(MODULE_NAME)" Optional
|
|
|
|
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
|
|
|
}
|
|
|
|
|
2010-06-29 06:55:13 +02:00
|
|
|
[Rule.Common.UEFI_DRIVER.BINARY]
|
2010-06-29 20:34:32 +02:00
|
|
|
FILE DRIVER = $(NAMED_GUID) {
|
2010-06-29 06:55:13 +02:00
|
|
|
DXE_DEPEX DXE_DEPEX Optional |.depex
|
|
|
|
PE32 PE32 |.efi
|
|
|
|
UI STRING="$(MODULE_NAME)" Optional
|
|
|
|
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
|
|
|
}
|
|
|
|
|
2009-05-27 23:10:18 +02:00
|
|
|
[Rule.Common.UEFI_APPLICATION]
|
|
|
|
FILE APPLICATION = $(NAMED_GUID) {
|
2010-03-01 07:47:58 +01:00
|
|
|
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
2009-05-27 23:10:18 +02:00
|
|
|
UI STRING="$(MODULE_NAME)" Optional
|
|
|
|
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
|
|
|
}
|
|
|
|
|
2010-06-29 06:55:13 +02:00
|
|
|
[Rule.Common.UEFI_APPLICATION.BINARY]
|
|
|
|
FILE APPLICATION = $(NAMED_GUID) {
|
|
|
|
PE32 PE32 |.efi
|
|
|
|
UI STRING="$(MODULE_NAME)" Optional
|
|
|
|
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
|
|
|
}
|
|
|
|
|
2009-08-11 07:30:52 +02:00
|
|
|
[Rule.Common.USER_DEFINED.ACPITABLE]
|
2009-05-27 23:10:18 +02:00
|
|
|
FILE FREEFORM = $(NAMED_GUID) {
|
2009-10-07 18:01:09 +02:00
|
|
|
RAW ACPI |.acpi
|
|
|
|
RAW ASL |.aml
|
2009-05-27 23:10:18 +02:00
|
|
|
}
|
|
|
|
|
2010-07-26 20:07:19 +02:00
|
|
|
[Rule.Common.SEC.RESET_VECTOR]
|
|
|
|
FILE RAW = $(NAMED_GUID) {
|
|
|
|
RAW RAW |.raw
|
|
|
|
}
|
|
|
|
|
2009-07-15 01:32:41 +02:00
|
|
|
[OptionRom.CirrusLogic5446]
|
|
|
|
INF OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430Dxe.inf {
|
|
|
|
PCI_DEVICE_ID = 0x00B8
|
|
|
|
}
|