2011-09-02 09:49:32 +02:00
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/** @file
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Basic TIS (TPM Interface Specification) functions.
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2018-06-27 15:13:09 +02:00
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Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>
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2019-04-04 01:06:56 +02:00
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SPDX-License-Identifier: BSD-2-Clause-Patent
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2011-09-02 09:49:32 +02:00
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**/
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#include "CommonHeader.h"
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/**
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Check whether TPM chip exist.
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@param[in] TisReg Pointer to TIS register.
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@retval TRUE TPM chip exists.
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@retval FALSE TPM chip is not found.
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**/
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BOOLEAN
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TisPcPresenceCheck (
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IN TIS_PC_REGISTERS_PTR TisReg
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)
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{
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UINT8 RegRead;
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2018-06-27 15:13:09 +02:00
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2011-09-02 09:49:32 +02:00
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RegRead = MmioRead8 ((UINTN)&TisReg->Access);
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return (BOOLEAN)(RegRead != (UINT8)-1);
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}
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/**
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Check whether the value of a TPM chip register satisfies the input BIT setting.
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@param[in] Register Address port of register to be checked.
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@param[in] BitSet Check these data bits are set.
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@param[in] BitClear Check these data bits are clear.
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@param[in] TimeOut The max wait time (unit MicroSecond) when checking register.
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@retval EFI_SUCCESS The register satisfies the check bit.
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@retval EFI_TIMEOUT The register can't run into the expected status in time.
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**/
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EFI_STATUS
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EFIAPI
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TisPcWaitRegisterBits (
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IN UINT8 *Register,
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IN UINT8 BitSet,
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IN UINT8 BitClear,
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IN UINT32 TimeOut
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)
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{
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UINT8 RegRead;
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UINT32 WaitTime;
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for (WaitTime = 0; WaitTime < TimeOut; WaitTime += 30) {
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RegRead = MmioRead8 ((UINTN)Register);
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if (((RegRead & BitSet) == BitSet) && ((RegRead & BitClear) == 0)) {
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return EFI_SUCCESS;
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2021-12-05 23:54:12 +01:00
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}
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2011-09-02 09:49:32 +02:00
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MicroSecondDelay (30);
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}
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2021-12-05 23:54:12 +01:00
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2011-09-02 09:49:32 +02:00
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return EFI_TIMEOUT;
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}
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/**
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2020-02-07 02:08:17 +01:00
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Get BurstCount by reading the burstCount field of a TIS register
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2011-09-02 09:49:32 +02:00
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in the time of default TIS_TIMEOUT_D.
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@param[in] TisReg Pointer to TIS register.
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2019-10-09 09:20:15 +02:00
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@param[out] BurstCount Pointer to a buffer to store the got BurstCount.
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2011-09-02 09:49:32 +02:00
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@retval EFI_SUCCESS Get BurstCount.
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@retval EFI_INVALID_PARAMETER TisReg is NULL or BurstCount is NULL.
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@retval EFI_TIMEOUT BurstCount can't be got in time.
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**/
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EFI_STATUS
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EFIAPI
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TisPcReadBurstCount (
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IN TIS_PC_REGISTERS_PTR TisReg,
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OUT UINT16 *BurstCount
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)
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{
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UINT32 WaitTime;
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UINT8 DataByte0;
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UINT8 DataByte1;
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if ((BurstCount == NULL) || (TisReg == NULL)) {
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return EFI_INVALID_PARAMETER;
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}
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WaitTime = 0;
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do {
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//
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// TIS_PC_REGISTERS_PTR->burstCount is UINT16, but it is not 2bytes aligned,
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// so it needs to use MmioRead8 to read two times
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//
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DataByte0 = MmioRead8 ((UINTN)&TisReg->BurstCount);
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DataByte1 = MmioRead8 ((UINTN)&TisReg->BurstCount + 1);
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*BurstCount = (UINT16)((DataByte1 << 8) + DataByte0);
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if (*BurstCount != 0) {
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return EFI_SUCCESS;
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}
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2021-12-05 23:54:12 +01:00
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2011-09-02 09:49:32 +02:00
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MicroSecondDelay (30);
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WaitTime += 30;
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} while (WaitTime < TIS_TIMEOUT_D);
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return EFI_TIMEOUT;
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}
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/**
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2018-06-27 15:13:09 +02:00
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Set TPM chip to ready state by sending ready command TIS_PC_STS_READY
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2011-09-02 09:49:32 +02:00
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to Status Register in time.
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@param[in] TisReg Pointer to TIS register.
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@retval EFI_SUCCESS TPM chip enters into ready state.
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@retval EFI_INVALID_PARAMETER TisReg is NULL.
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@retval EFI_TIMEOUT TPM chip can't be set to ready state in time.
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**/
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EFI_STATUS
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EFIAPI
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TisPcPrepareCommand (
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IN TIS_PC_REGISTERS_PTR TisReg
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)
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{
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EFI_STATUS Status;
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if (TisReg == NULL) {
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return EFI_INVALID_PARAMETER;
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}
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MmioWrite8 ((UINTN)&TisReg->Status, TIS_PC_STS_READY);
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Status = TisPcWaitRegisterBits (
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&TisReg->Status,
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TIS_PC_STS_READY,
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0,
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TIS_TIMEOUT_B
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);
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return Status;
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}
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/**
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2018-06-27 15:13:09 +02:00
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Get the control of TPM chip by sending requestUse command TIS_PC_ACC_RQUUSE
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2012-10-16 04:58:08 +02:00
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to ACCESS Register in the time of default TIS_TIMEOUT_A.
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2011-09-02 09:49:32 +02:00
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@param[in] TisReg Pointer to TIS register.
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@retval EFI_SUCCESS Get the control of TPM chip.
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@retval EFI_INVALID_PARAMETER TisReg is NULL.
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@retval EFI_NOT_FOUND TPM chip doesn't exit.
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@retval EFI_TIMEOUT Can't get the TPM control in time.
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**/
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EFI_STATUS
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EFIAPI
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TisPcRequestUseTpm (
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IN TIS_PC_REGISTERS_PTR TisReg
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)
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{
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EFI_STATUS Status;
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2018-06-27 15:13:09 +02:00
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2011-09-02 09:49:32 +02:00
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if (TisReg == NULL) {
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return EFI_INVALID_PARAMETER;
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}
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2018-06-27 15:13:09 +02:00
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2011-09-02 09:49:32 +02:00
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if (!TisPcPresenceCheck (TisReg)) {
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return EFI_NOT_FOUND;
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}
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MmioWrite8 ((UINTN)&TisReg->Access, TIS_PC_ACC_RQUUSE);
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2012-10-16 04:58:08 +02:00
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//
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// No locality set before, ACCESS_X.activeLocality MUST be valid within TIMEOUT_A
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//
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2011-09-02 09:49:32 +02:00
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Status = TisPcWaitRegisterBits (
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&TisReg->Access,
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(UINT8)(TIS_PC_ACC_ACTIVE |TIS_PC_VALID),
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0,
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2012-10-16 04:58:08 +02:00
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TIS_TIMEOUT_A
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2011-09-02 09:49:32 +02:00
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);
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return Status;
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}
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