2013-11-22 07:24:41 +01:00
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/** @file
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X64 arch definition for CPU Exception Handler Library.
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Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef _ARCH_CPU_INTERRUPT_DEFS_H_
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#define _ARCH_CPU_INTERRUPT_DEFS_H_
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typedef struct {
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EFI_SYSTEM_CONTEXT_X64 SystemContext;
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BOOLEAN ExceptionDataFlag;
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UINTN OldIdtHandler;
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} EXCEPTION_HANDLER_CONTEXT;
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//
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// Register Structure Definitions
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//
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typedef struct {
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EFI_STATUS_CODE_DATA Header;
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EFI_SYSTEM_CONTEXT_X64 SystemContext;
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} CPU_STATUS_CODE_TEMPLATE;
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typedef struct {
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SPIN_LOCK SpinLock;
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UINT32 ApicId;
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UINT32 Attribute;
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UINTN ExceptonHandler;
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UINTN OldSs;
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UINTN OldSp;
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UINTN OldFlags;
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UINTN OldCs;
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UINTN OldIp;
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UINTN ExceptionData;
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UINT8 HookAfterStubHeaderCode[HOOKAFTER_STUB_SIZE];
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} RESERVED_VECTORS_DATA;
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UefiCpuPkg/CpuExceptionHandlerLib: Add stack switch support
If Stack Guard is enabled and there's really a stack overflow happened during
boot, a Page Fault exception will be triggered. Because the stack is out of
usage, the exception handler, which shares the stack with normal UEFI driver,
cannot be executed and cannot dump the processor information.
Without those information, it's very difficult for the BIOS developers locate
the root cause of stack overflow. And without a workable stack, the developer
cannot event use single step to debug the UEFI driver with JTAG debugger.
In order to make sure the exception handler to execute normally after stack
overflow. We need separate stacks for exception handlers in case of unusable
stack.
IA processor allows to switch to a new stack during handling interrupt and
exception. But X64 and IA32 provides different ways to make it. X64 provides
interrupt stack table (IST) to allow maximum 7 different exceptions to have
new stack for its handler. IA32 doesn't have IST mechanism and can only use
task gate to do it since task switch allows to load a new stack through its
task-state segment (TSS).
The new API, InitializeCpuExceptionHandlersEx, is implemented to complete
extra initialization for stack switch of exception handler. Since setting
up stack switch needs allocating new memory for new stack, new GDT table
and task-state segment but the initialization method will be called in
different phases which have no consistent way to reserve those memory, this
new API is allowed to pass the reserved resources to complete the extra
works. This is cannot be done by original InitializeCpuExceptionHandlers.
Considering exception handler initialization for MP situation, this new API
is also necessary, because AP is not supposed to allocate memory. So the
memory needed for stack switch have to be reserved in BSP before waking up
AP and then pass them to InitializeCpuExceptionHandlersEx afterwards.
Since Stack Guard feature is available only for DXE phase at this time, the
new API is fully implemented for DXE only. Other phases implement a dummy
one which just calls InitializeCpuExceptionHandlers().
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Suggested-by: Ayellet Wolman <ayellet.wolman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Jeff Fan <vanjeff_919@hotmail.com>
Reviewed-by: Jiewen.yao@intel.com
2017-12-07 13:15:12 +01:00
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#define CPU_TSS_DESC_SIZE sizeof (IA32_TSS_DESCRIPTOR)
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#define CPU_TSS_SIZE sizeof (IA32_TASK_STATE_SEGMENT)
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2013-11-22 07:24:41 +01:00
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#endif
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