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audk/MdePkg/Include/Ia32/Nasm.inc

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MdePkg/Include: Add Nasm.inc REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1521 This is to add CET related instruction in Nasm because CET instruction is not supported yet. See https://www.nasm.us/xdoc/2.14.02/html/nasmdocb.html Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yao Jiewen <jiewen.yao@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
2019-02-22 14:30:33 +01:00
;------------------------------------------------------------------------------
;
; Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
MdePkg: Replace BSD License with BSD+Patent License https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-04-04 01:06:00 +02:00
; SPDX-License-Identifier: BSD-2-Clause-Patent
MdePkg/Include: Add Nasm.inc REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1521 This is to add CET related instruction in Nasm because CET instruction is not supported yet. See https://www.nasm.us/xdoc/2.14.02/html/nasmdocb.html Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yao Jiewen <jiewen.yao@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
2019-02-22 14:30:33 +01:00
;
; Abstract:
;
; This file provides macro definitions for NASM files.
;
;------------------------------------------------------------------------------
MdePkg/Include: Add CET instructions to Nasm.inc This is to add instruction SAVEPREVSSP, CLRSSBSY and RSTORSSP_RAX in Nasm. The open CI is using NASM 2.14.02. CET instructions are supported since NASM 2.15.01. DB-encoded CET instructions need to be removed after open CI update to NASM 2.15.01. The BZ ticket is https://bugzilla.tianocore.org/show_bug.cgi?id=3227 . REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3192 Signed-off-by: Sheng Wei <w.sheng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
2021-01-26 09:54:15 +01:00
%macro SAVEPREVSSP 0
DB 0xF3, 0x0F, 0x01, 0xEA
%endmacro
%macro CLRSSBSY_EAX 0
DB 0x67, 0xF3, 0x0F, 0xAE, 0x30
%endmacro
%macro RSTORSSP_EAX 0
DB 0x67, 0xF3, 0x0F, 0x01, 0x28
%endmacro
MdePkg/Include: Add Nasm.inc REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1521 This is to add CET related instruction in Nasm because CET instruction is not supported yet. See https://www.nasm.us/xdoc/2.14.02/html/nasmdocb.html Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yao Jiewen <jiewen.yao@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
2019-02-22 14:30:33 +01:00
%macro SETSSBSY 0
DB 0xF3, 0x0F, 0x01, 0xE8
%endmacro
%macro READSSP_EAX 0
DB 0xF3, 0x0F, 0x1E, 0xC8
%endmacro
%macro INCSSP_EAX 0
DB 0xF3, 0x0F, 0xAE, 0xE8
%endmacro