2013-01-25 12:28:06 +01:00
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# FLASH layout file for ARM VE.
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#
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# Copyright (c) 2011, ARM Limited. All rights reserved.
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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################################################################################
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#
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# FD Section
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# The [FD] Section is made up of the definition statements and a
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# description of what goes into the Flash Device Image. Each FD section
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# defines one flash "device" image. A flash device image may be one of
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# the following: Removable media bootable image (like a boot floppy
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# image,) an Option ROM image (that would be "flashed" into an add-in
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# card,) a System "Flash" image (that would be burned into a system's
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# flash) or an Update ("Capsule") image that will be used to update and
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# existing system flash.
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#
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################################################################################
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[FD.RTSM_VE_Cortex-A15_EFI]
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BaseAddress = 0x08000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.
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2013-06-17 11:52:51 +02:00
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Size = 0x00300000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device
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2013-01-25 12:28:06 +01:00
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ErasePolarity = 1
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# This one is tricky, it must be: BlockSize * NumBlocks = Size
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BlockSize = 0x00001000
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2013-06-17 11:52:51 +02:00
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NumBlocks = 0x300
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2013-01-25 12:28:06 +01:00
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################################################################################
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#
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# Following are lists of FD Region layout which correspond to the locations of different
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# images within the flash device.
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#
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# Regions must be defined in ascending order and may not overlap.
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#
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# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
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# the pipe "|" character, followed by the size of the region, also in hex with the leading
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# "0x" characters. Like:
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# Offset|Size
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# PcdOffsetCName|PcdSizeCName
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# RegionType <FV, DATA, or FILE>
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#
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################################################################################
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0x00000000|0x00080000
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gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize
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FV = FVMAIN_SEC
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0x00080000|0x00280000
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gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
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FV = FVMAIN_COMPACT
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################################################################################
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#
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# FV Section
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#
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# [FV] section is used to define what components or modules are placed within a flash
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# device file. This section also defines order the components and modules are positioned
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# within the image. The [FV] section consists of define statements, set statements and
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# module statements.
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#
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################################################################################
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[FV.FVMAIN_SEC]
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FvAlignment = 8
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ERASE_POLARITY = 1
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MEMORY_MAPPED = TRUE
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STICKY_WRITE = TRUE
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LOCK_CAP = TRUE
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LOCK_STATUS = TRUE
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WRITE_DISABLED_CAP = TRUE
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WRITE_ENABLED_CAP = TRUE
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WRITE_STATUS = TRUE
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WRITE_LOCK_CAP = TRUE
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WRITE_LOCK_STATUS = TRUE
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READ_DISABLED_CAP = TRUE
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READ_ENABLED_CAP = TRUE
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READ_STATUS = TRUE
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READ_LOCK_CAP = TRUE
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READ_LOCK_STATUS = TRUE
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INF ArmPlatformPkg/Sec/Sec.inf
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[FV.FvMain]
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BlockSize = 0x40
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NumBlocks = 0 # This FV gets compressed so make it just big enough
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FvAlignment = 8 # FV alignment and FV attributes setting.
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ERASE_POLARITY = 1
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MEMORY_MAPPED = TRUE
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STICKY_WRITE = TRUE
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LOCK_CAP = TRUE
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LOCK_STATUS = TRUE
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WRITE_DISABLED_CAP = TRUE
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WRITE_ENABLED_CAP = TRUE
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WRITE_STATUS = TRUE
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WRITE_LOCK_CAP = TRUE
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WRITE_LOCK_STATUS = TRUE
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READ_DISABLED_CAP = TRUE
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READ_ENABLED_CAP = TRUE
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READ_STATUS = TRUE
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READ_LOCK_CAP = TRUE
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READ_LOCK_STATUS = TRUE
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INF MdeModulePkg/Core/Dxe/DxeMain.inf
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#
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# PI DXE Drivers producing Architectural Protocols (EFI Services)
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#
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INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
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INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
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INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
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INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
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INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
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INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
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INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
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INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
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INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
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INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
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INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
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#
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# Multiple Console IO support
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#
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INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
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INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
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INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
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INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
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INF EmbeddedPkg/SerialDxe/SerialDxe.inf
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2013-10-29 07:36:34 +01:00
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INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
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2013-01-25 12:28:06 +01:00
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INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
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INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
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INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
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INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
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#
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# Semi-hosting filesystem
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#
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INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
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#
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# FAT filesystem + GPT/MBR partitioning
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#
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INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
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INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
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INF FatBinPkg/EnhancedFatDxe/Fat.inf
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INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
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#
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# Multimedia Card Interface
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#
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INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf
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INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf
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#
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# UEFI application (Shell Embedded Boot Loader)
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#
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INF ShellBinPkg/UefiShell/UefiShell.inf
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#
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# Bds
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#
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INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
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INF ArmPlatformPkg/Bds/Bds.inf
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[FV.FVMAIN_COMPACT]
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FvAlignment = 8
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ERASE_POLARITY = 1
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MEMORY_MAPPED = TRUE
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STICKY_WRITE = TRUE
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LOCK_CAP = TRUE
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LOCK_STATUS = TRUE
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WRITE_DISABLED_CAP = TRUE
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WRITE_ENABLED_CAP = TRUE
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WRITE_STATUS = TRUE
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WRITE_LOCK_CAP = TRUE
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WRITE_LOCK_STATUS = TRUE
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READ_DISABLED_CAP = TRUE
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READ_ENABLED_CAP = TRUE
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READ_STATUS = TRUE
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READ_LOCK_CAP = TRUE
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READ_LOCK_STATUS = TRUE
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!if $(EDK2_SKIP_PEICORE) == 1
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INF ArmPlatformPkg/PrePi/PeiUniCore.inf
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!else
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INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
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INF MdeModulePkg/Core/Pei/PeiMain.inf
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INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
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INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
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INF ArmPkg/Drivers/CpuPei/CpuPei.inf
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INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
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INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
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INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
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INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
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!endif
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FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
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SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
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SECTION FV_IMAGE = FVMAIN
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}
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}
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################################################################################
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#
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# Rules are use with the [FV] section's module INF type to define
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# how an FFS file is created for a given INF file. The following Rule are the default
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# rules for the different module type. User can add the customized rules to define the
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# content of the FFS file.
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#
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################################################################################
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############################################################################
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# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #
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############################################################################
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#
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#[Rule.Common.DXE_DRIVER]
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# FILE DRIVER = $(NAMED_GUID) {
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# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
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# COMPRESS PI_STD {
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# GUIDED {
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# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
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# UI STRING="$(MODULE_NAME)" Optional
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# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
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# }
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# }
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# }
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#
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############################################################################
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[Rule.Common.SEC]
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FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
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TE TE Align = 32 $(INF_OUTPUT)/$(MODULE_NAME).efi
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}
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[Rule.Common.PEI_CORE]
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FILE PEI_CORE = $(NAMED_GUID) {
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TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
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UI STRING ="$(MODULE_NAME)" Optional
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}
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[Rule.Common.PEIM]
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FILE PEIM = $(NAMED_GUID) {
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PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
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TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
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UI STRING="$(MODULE_NAME)" Optional
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}
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[Rule.Common.PEIM.TIANOCOMPRESSED]
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FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
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PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
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GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
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PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
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UI STRING="$(MODULE_NAME)" Optional
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}
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}
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[Rule.Common.DXE_CORE]
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FILE DXE_CORE = $(NAMED_GUID) {
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PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
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UI STRING="$(MODULE_NAME)" Optional
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}
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[Rule.Common.UEFI_DRIVER]
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FILE DRIVER = $(NAMED_GUID) {
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DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
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PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
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UI STRING="$(MODULE_NAME)" Optional
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}
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[Rule.Common.DXE_DRIVER]
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FILE DRIVER = $(NAMED_GUID) {
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DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
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PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
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UI STRING="$(MODULE_NAME)" Optional
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}
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[Rule.Common.DXE_RUNTIME_DRIVER]
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FILE DRIVER = $(NAMED_GUID) {
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DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
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PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
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UI STRING="$(MODULE_NAME)" Optional
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}
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[Rule.Common.UEFI_APPLICATION]
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FILE APPLICATION = $(NAMED_GUID) {
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UI STRING ="$(MODULE_NAME)" Optional
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PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
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}
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[Rule.Common.UEFI_DRIVER.BINARY]
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FILE DRIVER = $(NAMED_GUID) {
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DXE_DEPEX DXE_DEPEX Optional |.depex
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PE32 PE32 |.efi
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UI STRING="$(MODULE_NAME)" Optional
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VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
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}
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[Rule.Common.UEFI_APPLICATION.BINARY]
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FILE APPLICATION = $(NAMED_GUID) {
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PE32 PE32 |.efi
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UI STRING="$(MODULE_NAME)" Optional
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VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
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}
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