2011-06-10 20:58:08 +02:00
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/** @file
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I/O Library basic function implementation and worker functions.
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Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
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2017-01-13 21:09:57 +01:00
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Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
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2011-06-10 20:58:08 +02:00
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php.
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "DxeIoLibEsalInternal.h"
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/**
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Reads registers in the EFI CPU I/O space.
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Reads the I/O port specified by Port with registers width specified by Width.
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2017-01-13 21:09:57 +01:00
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The read value is returned.
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2011-06-10 20:58:08 +02:00
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This function must guarantee that all I/O read and write operations are serialized.
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2017-01-13 21:09:57 +01:00
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If such operations are not supported, then ASSERT().
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2011-06-10 20:58:08 +02:00
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@param Port The base address of the I/O operation.
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The caller is responsible for aligning the Address if required.
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@param Width The width of the I/O operation.
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@return Data read from registers in the EFI CPU I/O space.
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**/
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UINT64
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EFIAPI
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IoReadWorker (
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IN UINTN Port,
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IN EFI_CPU_IO_PROTOCOL_WIDTH Width
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)
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{
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SAL_RETURN_REGS ReturnReg;
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UINT64 Data;
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2011-06-21 04:24:46 +02:00
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Data = 0;
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2011-06-10 20:58:08 +02:00
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ReturnReg = EsalCall (
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EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,
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EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,
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IoReadFunctionId,
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(UINT64)Width,
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Port,
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1,
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(UINT64)&Data,
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0,
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0,
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0
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);
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ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);
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return Data;
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}
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/**
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Writes registers in the EFI CPU I/O space.
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Writes the I/O port specified by Port with registers width and value specified by Width
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2017-01-13 21:09:57 +01:00
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and Data respectively. Data is returned.
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2011-06-10 20:58:08 +02:00
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This function must guarantee that all I/O read and write operations are serialized.
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2017-01-13 21:09:57 +01:00
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If such operations are not supported, then ASSERT().
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2011-06-10 20:58:08 +02:00
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@param Port The base address of the I/O operation.
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The caller is responsible for aligning the Address if required.
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@param Width The width of the I/O operation.
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@param Data The value to write to the I/O port.
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2016-10-19 09:01:27 +02:00
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@return The parameter of Data.
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2011-06-10 20:58:08 +02:00
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**/
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UINT64
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EFIAPI
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IoWriteWorker (
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IN UINTN Port,
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IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
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IN UINT64 Data
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)
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{
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SAL_RETURN_REGS ReturnReg;
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ReturnReg = EsalCall (
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EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,
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EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,
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IoWriteFunctionId,
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(UINT64)Width,
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Port,
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1,
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(UINT64)&Data,
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0,
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0,
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0
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);
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ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);
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return Data;
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}
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2017-01-13 21:09:57 +01:00
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/**
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Reads registers in the EFI CPU I/O space.
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Reads the I/O port specified by Port with registers width specified by Width.
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The port is read Count times, and the read data is stored in the provided Buffer.
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This function must guarantee that all I/O read and write operations are serialized.
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If such operations are not supported, then ASSERT().
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@param Port The base address of the I/O operation.
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The caller is responsible for aligning the Address if required.
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@param Width The width of the I/O operation.
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@param Count The number of times to read I/O port.
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@param Buffer The buffer to store the read data into.
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**/
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VOID
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EFIAPI
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IoReadFifoWorker (
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IN UINTN Port,
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IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
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IN UINTN Count,
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IN VOID *Buffer
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)
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{
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SAL_RETURN_REGS ReturnReg;
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ReturnReg = EsalCall (
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EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,
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EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,
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IoReadFunctionId,
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(UINT64)Width,
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Port,
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Count,
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(UINT64)Buffer,
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0,
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0,
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0
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);
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ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);
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}
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/**
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Writes registers in the EFI CPU I/O space.
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Writes the I/O port specified by Port with registers width specified by Width.
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The port is written Count times, and the write data is retrieved from the provided Buffer.
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This function must guarantee that all I/O read and write operations are serialized.
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If such operations are not supported, then ASSERT().
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@param Port The base address of the I/O operation.
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The caller is responsible for aligning the Address if required.
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@param Width The width of the I/O operation.
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@param Count The number of times to write I/O port.
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@param Buffer The buffer to store the read data into.
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**/
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VOID
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EFIAPI
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IoWriteFifoWorker (
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IN UINTN Port,
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IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
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IN UINTN Count,
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IN VOID *Buffer
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)
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{
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SAL_RETURN_REGS ReturnReg;
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ReturnReg = EsalCall (
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EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,
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EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,
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IoWriteFunctionId,
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(UINT64)Width,
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Port,
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Count,
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(UINT64)Buffer,
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0,
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0,
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0
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);
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ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);
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}
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2011-06-10 20:58:08 +02:00
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/**
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Reads memory-mapped registers in the EFI system memory space.
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Reads the MMIO registers specified by Address with registers width specified by Width.
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The read value is returned. If such operations are not supported, then ASSERT().
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This function must guarantee that all MMIO read and write operations are serialized.
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@param Address The MMIO register to read.
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The caller is responsible for aligning the Address if required.
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@param Width The width of the I/O operation.
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@return Data read from registers in the EFI system memory space.
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**/
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UINT64
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EFIAPI
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MmioReadWorker (
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IN UINTN Address,
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IN EFI_CPU_IO_PROTOCOL_WIDTH Width
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)
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{
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SAL_RETURN_REGS ReturnReg;
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UINT64 Data;
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2011-06-21 04:24:46 +02:00
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Data = 0;
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2011-06-10 20:58:08 +02:00
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ReturnReg = EsalCall (
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EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,
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EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,
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MemReadFunctionId,
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(UINT64)Width,
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Address,
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1,
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(UINT64)&Data,
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0,
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0,
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0
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);
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ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);
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return Data;
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}
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/**
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Writes memory-mapped registers in the EFI system memory space.
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Writes the MMIO registers specified by Address with registers width and value specified by Width
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and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
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This function must guarantee that all MMIO read and write operations are serialized.
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@param Address The MMIO register to read.
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The caller is responsible for aligning the Address if required.
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@param Width The width of the I/O operation.
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@param Data The value to write to memory-mapped registers
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@return Data read from registers in the EFI system memory space.
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**/
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UINT64
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EFIAPI
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MmioWriteWorker (
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IN UINTN Address,
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IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
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IN UINT64 Data
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)
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{
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SAL_RETURN_REGS ReturnReg;
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ReturnReg = EsalCall (
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EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,
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EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,
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MemWriteFunctionId,
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(UINT64)Width,
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Address,
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1,
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(UINT64)&Data,
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0,
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0,
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0
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);
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ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);
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return Data;
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}
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/**
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Reads an 8-bit I/O port.
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Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
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This function must guarantee that all I/O read and write operations are
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serialized.
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If 8-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to read.
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@return The value read.
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**/
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UINT8
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EFIAPI
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IoRead8 (
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IN UINTN Port
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)
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{
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return (UINT8)IoReadWorker (Port, EfiCpuIoWidthUint8);
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}
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/**
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Writes an 8-bit I/O port.
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Writes the 8-bit I/O port specified by Port with the value specified by Value
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and returns Value. This function must guarantee that all I/O read and write
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operations are serialized.
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If 8-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to write.
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@param Value The value to write to the I/O port.
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@return The value written the I/O port.
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**/
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UINT8
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EFIAPI
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IoWrite8 (
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IN UINTN Port,
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IN UINT8 Value
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)
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{
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return (UINT8)IoWriteWorker (Port, EfiCpuIoWidthUint8, Value);
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}
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/**
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Reads a 16-bit I/O port.
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Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
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This function must guarantee that all I/O read and write operations are
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serialized.
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If 16-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to read.
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@return The value read.
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**/
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UINT16
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EFIAPI
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IoRead16 (
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IN UINTN Port
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)
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{
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//
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// Make sure Port is aligned on a 16-bit boundary.
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//
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ASSERT ((Port & 1) == 0);
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return (UINT16)IoReadWorker (Port, EfiCpuIoWidthUint16);
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}
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/**
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Writes a 16-bit I/O port.
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Writes the 16-bit I/O port specified by Port with the value specified by Value
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and returns Value. This function must guarantee that all I/O read and write
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operations are serialized.
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If 16-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to write.
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@param Value The value to write to the I/O port.
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@return The value written the I/O port.
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**/
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UINT16
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EFIAPI
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IoWrite16 (
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IN UINTN Port,
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IN UINT16 Value
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)
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{
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//
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// Make sure Port is aligned on a 16-bit boundary.
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//
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ASSERT ((Port & 1) == 0);
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return (UINT16)IoWriteWorker (Port, EfiCpuIoWidthUint16, Value);
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}
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/**
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Reads a 32-bit I/O port.
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Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
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This function must guarantee that all I/O read and write operations are
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serialized.
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If 32-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to read.
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@return The value read.
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**/
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UINT32
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EFIAPI
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IoRead32 (
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|
|
|
IN UINTN Port
|
|
|
|
)
|
|
|
|
{
|
|
|
|
//
|
|
|
|
// Make sure Port is aligned on a 32-bit boundary.
|
|
|
|
//
|
|
|
|
ASSERT ((Port & 3) == 0);
|
|
|
|
return (UINT32)IoReadWorker (Port, EfiCpuIoWidthUint32);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
Writes a 32-bit I/O port.
|
|
|
|
|
|
|
|
Writes the 32-bit I/O port specified by Port with the value specified by Value
|
|
|
|
and returns Value. This function must guarantee that all I/O read and write
|
|
|
|
operations are serialized.
|
|
|
|
|
|
|
|
If 32-bit I/O port operations are not supported, then ASSERT().
|
|
|
|
|
|
|
|
@param Port The I/O port to write.
|
|
|
|
@param Value The value to write to the I/O port.
|
|
|
|
|
|
|
|
@return The value written the I/O port.
|
|
|
|
|
|
|
|
**/
|
|
|
|
UINT32
|
|
|
|
EFIAPI
|
|
|
|
IoWrite32 (
|
|
|
|
IN UINTN Port,
|
|
|
|
IN UINT32 Value
|
|
|
|
)
|
|
|
|
{
|
|
|
|
//
|
|
|
|
// Make sure Port is aligned on a 32-bit boundary.
|
|
|
|
//
|
|
|
|
ASSERT ((Port & 3) == 0);
|
|
|
|
return (UINT32)IoWriteWorker (Port, EfiCpuIoWidthUint32, Value);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
Reads a 64-bit I/O port.
|
|
|
|
|
|
|
|
Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
|
|
|
|
This function must guarantee that all I/O read and write operations are
|
|
|
|
serialized.
|
|
|
|
|
|
|
|
If 64-bit I/O port operations are not supported, then ASSERT().
|
|
|
|
|
|
|
|
@param Port The I/O port to read.
|
|
|
|
|
|
|
|
@return The value read.
|
|
|
|
|
|
|
|
**/
|
|
|
|
UINT64
|
|
|
|
EFIAPI
|
|
|
|
IoRead64 (
|
|
|
|
IN UINTN Port
|
|
|
|
)
|
|
|
|
{
|
|
|
|
//
|
|
|
|
// Make sure Port is aligned on a 64-bit boundary.
|
|
|
|
//
|
|
|
|
ASSERT ((Port & 7) == 0);
|
|
|
|
return IoReadWorker (Port, EfiCpuIoWidthUint64);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
Writes a 64-bit I/O port.
|
|
|
|
|
|
|
|
Writes the 64-bit I/O port specified by Port with the value specified by Value
|
|
|
|
and returns Value. This function must guarantee that all I/O read and write
|
|
|
|
operations are serialized.
|
|
|
|
|
|
|
|
If 64-bit I/O port operations are not supported, then ASSERT().
|
|
|
|
|
|
|
|
@param Port The I/O port to write.
|
|
|
|
@param Value The value to write to the I/O port.
|
|
|
|
|
|
|
|
@return The value written the I/O port.
|
|
|
|
|
|
|
|
**/
|
|
|
|
UINT64
|
|
|
|
EFIAPI
|
|
|
|
IoWrite64 (
|
|
|
|
IN UINTN Port,
|
|
|
|
IN UINT64 Value
|
|
|
|
)
|
|
|
|
{
|
|
|
|
//
|
|
|
|
// Make sure Port is aligned on a 64-bit boundary.
|
|
|
|
//
|
|
|
|
ASSERT ((Port & 7) == 0);
|
|
|
|
return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);
|
|
|
|
}
|
|
|
|
|
2017-01-13 21:09:57 +01:00
|
|
|
/**
|
|
|
|
Reads an 8-bit I/O port fifo into a block of memory.
|
|
|
|
|
|
|
|
Reads the 8-bit I/O fifo port specified by Port.
|
|
|
|
The port is read Count times, and the read data is
|
|
|
|
stored in the provided Buffer.
|
|
|
|
|
|
|
|
This function must guarantee that all I/O read and write operations are
|
|
|
|
serialized.
|
|
|
|
|
|
|
|
If 8-bit I/O port operations are not supported, then ASSERT().
|
|
|
|
|
|
|
|
@param Port The I/O port to read.
|
|
|
|
@param Count The number of times to read I/O port.
|
|
|
|
@param Buffer The buffer to store the read data into.
|
|
|
|
|
|
|
|
**/
|
|
|
|
VOID
|
|
|
|
EFIAPI
|
|
|
|
IoReadFifo8 (
|
|
|
|
IN UINTN Port,
|
|
|
|
IN UINTN Count,
|
|
|
|
OUT VOID *Buffer
|
|
|
|
)
|
|
|
|
{
|
|
|
|
IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
Writes a block of memory into an 8-bit I/O port fifo.
|
|
|
|
|
|
|
|
Writes the 8-bit I/O fifo port specified by Port.
|
|
|
|
The port is written Count times, and the write data is
|
|
|
|
retrieved from the provided Buffer.
|
|
|
|
|
|
|
|
This function must guarantee that all I/O write and write operations are
|
|
|
|
serialized.
|
|
|
|
|
|
|
|
If 8-bit I/O port operations are not supported, then ASSERT().
|
|
|
|
|
|
|
|
@param Port The I/O port to write.
|
|
|
|
@param Count The number of times to write I/O port.
|
|
|
|
@param Buffer The buffer to retrieve the write data from.
|
|
|
|
|
|
|
|
**/
|
|
|
|
VOID
|
|
|
|
EFIAPI
|
|
|
|
IoWriteFifo8 (
|
|
|
|
IN UINTN Port,
|
|
|
|
IN UINTN Count,
|
|
|
|
IN VOID *Buffer
|
|
|
|
)
|
|
|
|
{
|
|
|
|
IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
Reads a 16-bit I/O port fifo into a block of memory.
|
|
|
|
|
|
|
|
Reads the 16-bit I/O fifo port specified by Port.
|
|
|
|
The port is read Count times, and the read data is
|
|
|
|
stored in the provided Buffer.
|
|
|
|
|
|
|
|
This function must guarantee that all I/O read and write operations are
|
|
|
|
serialized.
|
|
|
|
|
|
|
|
If 16-bit I/O port operations are not supported, then ASSERT().
|
|
|
|
|
|
|
|
@param Port The I/O port to read.
|
|
|
|
@param Count The number of times to read I/O port.
|
|
|
|
@param Buffer The buffer to store the read data into.
|
|
|
|
|
|
|
|
**/
|
|
|
|
VOID
|
|
|
|
EFIAPI
|
|
|
|
IoReadFifo16 (
|
|
|
|
IN UINTN Port,
|
|
|
|
IN UINTN Count,
|
|
|
|
OUT VOID *Buffer
|
|
|
|
)
|
|
|
|
{
|
|
|
|
//
|
|
|
|
// Make sure Port is aligned on a 16-bit boundary.
|
|
|
|
//
|
|
|
|
ASSERT ((Port & 1) == 0);
|
|
|
|
IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
Writes a block of memory into a 16-bit I/O port fifo.
|
|
|
|
|
|
|
|
Writes the 16-bit I/O fifo port specified by Port.
|
|
|
|
The port is written Count times, and the write data is
|
|
|
|
retrieved from the provided Buffer.
|
|
|
|
|
|
|
|
This function must guarantee that all I/O write and write operations are
|
|
|
|
serialized.
|
|
|
|
|
|
|
|
If 16-bit I/O port operations are not supported, then ASSERT().
|
|
|
|
|
|
|
|
@param Port The I/O port to write.
|
|
|
|
@param Count The number of times to write I/O port.
|
|
|
|
@param Buffer The buffer to retrieve the write data from.
|
|
|
|
|
|
|
|
**/
|
|
|
|
VOID
|
|
|
|
EFIAPI
|
|
|
|
IoWriteFifo16 (
|
|
|
|
IN UINTN Port,
|
|
|
|
IN UINTN Count,
|
|
|
|
IN VOID *Buffer
|
|
|
|
)
|
|
|
|
{
|
|
|
|
//
|
|
|
|
// Make sure Port is aligned on a 16-bit boundary.
|
|
|
|
//
|
|
|
|
ASSERT ((Port & 1) == 0);
|
|
|
|
IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
Reads a 32-bit I/O port fifo into a block of memory.
|
|
|
|
|
|
|
|
Reads the 32-bit I/O fifo port specified by Port.
|
|
|
|
The port is read Count times, and the read data is
|
|
|
|
stored in the provided Buffer.
|
|
|
|
|
|
|
|
This function must guarantee that all I/O read and write operations are
|
|
|
|
serialized.
|
|
|
|
|
|
|
|
If 32-bit I/O port operations are not supported, then ASSERT().
|
|
|
|
|
|
|
|
@param Port The I/O port to read.
|
|
|
|
@param Count The number of times to read I/O port.
|
|
|
|
@param Buffer The buffer to store the read data into.
|
|
|
|
|
|
|
|
**/
|
|
|
|
VOID
|
|
|
|
EFIAPI
|
|
|
|
IoReadFifo32 (
|
|
|
|
IN UINTN Port,
|
|
|
|
IN UINTN Count,
|
|
|
|
OUT VOID *Buffer
|
|
|
|
)
|
|
|
|
{
|
|
|
|
//
|
|
|
|
// Make sure Port is aligned on a 32-bit boundary.
|
|
|
|
//
|
|
|
|
ASSERT ((Port & 3) == 0);
|
|
|
|
IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
Writes a block of memory into a 32-bit I/O port fifo.
|
|
|
|
|
|
|
|
Writes the 32-bit I/O fifo port specified by Port.
|
|
|
|
The port is written Count times, and the write data is
|
|
|
|
retrieved from the provided Buffer.
|
|
|
|
|
|
|
|
This function must guarantee that all I/O write and write operations are
|
|
|
|
serialized.
|
|
|
|
|
|
|
|
If 32-bit I/O port operations are not supported, then ASSERT().
|
|
|
|
|
|
|
|
@param Port The I/O port to write.
|
|
|
|
@param Count The number of times to write I/O port.
|
|
|
|
@param Buffer The buffer to retrieve the write data from.
|
|
|
|
|
|
|
|
**/
|
|
|
|
VOID
|
|
|
|
EFIAPI
|
|
|
|
IoWriteFifo32 (
|
|
|
|
IN UINTN Port,
|
|
|
|
IN UINTN Count,
|
|
|
|
IN VOID *Buffer
|
|
|
|
)
|
|
|
|
{
|
|
|
|
//
|
|
|
|
// Make sure Port is aligned on a 32-bit boundary.
|
|
|
|
//
|
|
|
|
ASSERT ((Port & 3) == 0);
|
|
|
|
IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);
|
|
|
|
}
|
|
|
|
|
2011-06-10 20:58:08 +02:00
|
|
|
/**
|
|
|
|
Reads an 8-bit MMIO register.
|
|
|
|
|
|
|
|
Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
|
|
|
|
returned. This function must guarantee that all MMIO read and write
|
|
|
|
operations are serialized.
|
|
|
|
|
|
|
|
If 8-bit MMIO register operations are not supported, then ASSERT().
|
|
|
|
|
|
|
|
@param Address The MMIO register to read.
|
|
|
|
|
|
|
|
@return The value read.
|
|
|
|
|
|
|
|
**/
|
|
|
|
UINT8
|
|
|
|
EFIAPI
|
|
|
|
MmioRead8 (
|
|
|
|
IN UINTN Address
|
|
|
|
)
|
|
|
|
{
|
|
|
|
return (UINT8)MmioReadWorker (Address, EfiCpuIoWidthUint8);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
Writes an 8-bit MMIO register.
|
|
|
|
|
|
|
|
Writes the 8-bit MMIO register specified by Address with the value specified
|
|
|
|
by Value and returns Value. This function must guarantee that all MMIO read
|
|
|
|
and write operations are serialized.
|
|
|
|
|
|
|
|
If 8-bit MMIO register operations are not supported, then ASSERT().
|
|
|
|
|
|
|
|
@param Address The MMIO register to write.
|
|
|
|
@param Value The value to write to the MMIO register.
|
|
|
|
|
|
|
|
**/
|
|
|
|
UINT8
|
|
|
|
EFIAPI
|
|
|
|
MmioWrite8 (
|
|
|
|
IN UINTN Address,
|
|
|
|
IN UINT8 Value
|
|
|
|
)
|
|
|
|
{
|
|
|
|
return (UINT8)MmioWriteWorker (Address, EfiCpuIoWidthUint8, Value);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
Reads a 16-bit MMIO register.
|
|
|
|
|
|
|
|
Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
|
|
|
|
returned. This function must guarantee that all MMIO read and write
|
|
|
|
operations are serialized.
|
|
|
|
|
|
|
|
If 16-bit MMIO register operations are not supported, then ASSERT().
|
|
|
|
|
|
|
|
@param Address The MMIO register to read.
|
|
|
|
|
|
|
|
@return The value read.
|
|
|
|
|
|
|
|
**/
|
|
|
|
UINT16
|
|
|
|
EFIAPI
|
|
|
|
MmioRead16 (
|
|
|
|
IN UINTN Address
|
|
|
|
)
|
|
|
|
{
|
|
|
|
//
|
|
|
|
// Make sure Address is aligned on a 16-bit boundary.
|
|
|
|
//
|
|
|
|
ASSERT ((Address & 1) == 0);
|
|
|
|
return (UINT16)MmioReadWorker (Address, EfiCpuIoWidthUint16);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
Writes a 16-bit MMIO register.
|
|
|
|
|
|
|
|
Writes the 16-bit MMIO register specified by Address with the value specified
|
|
|
|
by Value and returns Value. This function must guarantee that all MMIO read
|
|
|
|
and write operations are serialized.
|
|
|
|
|
|
|
|
If 16-bit MMIO register operations are not supported, then ASSERT().
|
|
|
|
|
|
|
|
@param Address The MMIO register to write.
|
|
|
|
@param Value The value to write to the MMIO register.
|
|
|
|
|
|
|
|
**/
|
|
|
|
UINT16
|
|
|
|
EFIAPI
|
|
|
|
MmioWrite16 (
|
|
|
|
IN UINTN Address,
|
|
|
|
IN UINT16 Value
|
|
|
|
)
|
|
|
|
{
|
|
|
|
//
|
|
|
|
// Make sure Address is aligned on a 16-bit boundary.
|
|
|
|
//
|
|
|
|
ASSERT ((Address & 1) == 0);
|
|
|
|
return (UINT16)MmioWriteWorker (Address, EfiCpuIoWidthUint16, Value);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
Reads a 32-bit MMIO register.
|
|
|
|
|
|
|
|
Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
|
|
|
|
returned. This function must guarantee that all MMIO read and write
|
|
|
|
operations are serialized.
|
|
|
|
|
|
|
|
If 32-bit MMIO register operations are not supported, then ASSERT().
|
|
|
|
|
|
|
|
@param Address The MMIO register to read.
|
|
|
|
|
|
|
|
@return The value read.
|
|
|
|
|
|
|
|
**/
|
|
|
|
UINT32
|
|
|
|
EFIAPI
|
|
|
|
MmioRead32 (
|
|
|
|
IN UINTN Address
|
|
|
|
)
|
|
|
|
{
|
|
|
|
//
|
|
|
|
// Make sure Address is aligned on a 32-bit boundary.
|
|
|
|
//
|
|
|
|
ASSERT ((Address & 3) == 0);
|
|
|
|
return (UINT32)MmioReadWorker (Address, EfiCpuIoWidthUint32);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
Writes a 32-bit MMIO register.
|
|
|
|
|
|
|
|
Writes the 32-bit MMIO register specified by Address with the value specified
|
|
|
|
by Value and returns Value. This function must guarantee that all MMIO read
|
|
|
|
and write operations are serialized.
|
|
|
|
|
|
|
|
If 32-bit MMIO register operations are not supported, then ASSERT().
|
|
|
|
|
|
|
|
@param Address The MMIO register to write.
|
|
|
|
@param Value The value to write to the MMIO register.
|
|
|
|
|
|
|
|
**/
|
|
|
|
UINT32
|
|
|
|
EFIAPI
|
|
|
|
MmioWrite32 (
|
|
|
|
IN UINTN Address,
|
|
|
|
IN UINT32 Value
|
|
|
|
)
|
|
|
|
{
|
|
|
|
//
|
|
|
|
// Make sure Address is aligned on a 32-bit boundary.
|
|
|
|
//
|
|
|
|
ASSERT ((Address & 3) == 0);
|
|
|
|
return (UINT32)MmioWriteWorker (Address, EfiCpuIoWidthUint32, Value);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
Reads a 64-bit MMIO register.
|
|
|
|
|
|
|
|
Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
|
|
|
|
returned. This function must guarantee that all MMIO read and write
|
|
|
|
operations are serialized.
|
|
|
|
|
|
|
|
If 64-bit MMIO register operations are not supported, then ASSERT().
|
|
|
|
|
|
|
|
@param Address The MMIO register to read.
|
|
|
|
|
|
|
|
@return The value read.
|
|
|
|
|
|
|
|
**/
|
|
|
|
UINT64
|
|
|
|
EFIAPI
|
|
|
|
MmioRead64 (
|
|
|
|
IN UINTN Address
|
|
|
|
)
|
|
|
|
{
|
|
|
|
//
|
|
|
|
// Make sure Address is aligned on a 64-bit boundary.
|
|
|
|
//
|
|
|
|
ASSERT ((Address & 7) == 0);
|
|
|
|
return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
Writes a 64-bit MMIO register.
|
|
|
|
|
|
|
|
Writes the 64-bit MMIO register specified by Address with the value specified
|
|
|
|
by Value and returns Value. This function must guarantee that all MMIO read
|
|
|
|
and write operations are serialized.
|
|
|
|
|
|
|
|
If 64-bit MMIO register operations are not supported, then ASSERT().
|
|
|
|
|
|
|
|
@param Address The MMIO register to write.
|
|
|
|
@param Value The value to write to the MMIO register.
|
|
|
|
|
|
|
|
**/
|
|
|
|
UINT64
|
|
|
|
EFIAPI
|
|
|
|
MmioWrite64 (
|
|
|
|
IN UINTN Address,
|
|
|
|
IN UINT64 Value
|
|
|
|
)
|
|
|
|
{
|
|
|
|
//
|
|
|
|
// Make sure Address is aligned on a 64-bit boundary.
|
|
|
|
//
|
|
|
|
ASSERT ((Address & 7) == 0);
|
|
|
|
return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);
|
|
|
|
}
|