mirror of https://github.com/acidanthera/audk.git
66 lines
1.7 KiB
C
66 lines
1.7 KiB
C
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/** @file
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Copyright (c) 2011, ARM Limited. All rights reserved.
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef __ARM_CORTEX_A9_H__
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#define __ARM_CORTEX_A9_H__
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#include <Chipset/ArmV7.h>
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//
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// Cortex A9 feature bit definitions
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//
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#define A9_FEATURE_PARITY (1<<9)
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#define A9_FEATURE_AOW (1<<8)
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#define A9_FEATURE_EXCL (1<<7)
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#define A9_FEATURE_SMP (1<<6)
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#define A9_FEATURE_FOZ (1<<3)
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#define A9_FEATURE_DPREF (1<<2)
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#define A9_FEATURE_HINT (1<<1)
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#define A9_FEATURE_FWD (1<<0)
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//
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// Cortex A9 Watchdog
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//
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#define ARM_A9_WATCHDOG_REGION 0x600
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#define ARM_A9_WATCHDOG_LOAD_REGISTER 0x20
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#define ARM_A9_WATCHDOG_CONTROL_REGISTER 0x28
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#define ARM_A9_WATCHDOG_WATCHDOG_MODE (1 << 3)
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#define ARM_A9_WATCHDOG_TIMER_MODE (0 << 3)
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#define ARM_A9_WATCHDOG_SINGLE_SHOT (0 << 1)
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#define ARM_A9_WATCHDOG_AUTORELOAD (1 << 1)
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#define ARM_A9_WATCHDOG_ENABLE 1
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//
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// SCU register offsets & masks
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//
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#define A9_SCU_CONTROL_OFFSET 0x0
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#define A9_SCU_CONFIG_OFFSET 0x4
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#define A9_SCU_INVALL_OFFSET 0xC
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#define A9_SCU_FILT_START_OFFSET 0x40
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#define A9_SCU_FILT_END_OFFSET 0x44
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#define A9_SCU_SACR_OFFSET 0x50
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#define A9_SCU_SSACR_OFFSET 0x54
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UINTN
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EFIAPI
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ArmGetScuBaseAddress (
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VOID
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);
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#endif
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