2016-05-31 03:52:06 +02:00
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;------------------------------------------------------------------------------
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;
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2022-01-10 14:46:27 +01:00
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; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
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2019-04-04 01:06:00 +02:00
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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2016-05-31 03:52:06 +02:00
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;
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; Module Name:
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;
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; SetMem32.nasm
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;
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; Abstract:
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;
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; SetMem32 function
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;
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; Notes:
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;
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;------------------------------------------------------------------------------
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DEFAULT REL
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SECTION .text
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;------------------------------------------------------------------------------
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; VOID *
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; InternalMemSetMem32 (
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; IN VOID *Buffer,
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; IN UINTN Count,
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; IN UINT32 Value
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; )
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;------------------------------------------------------------------------------
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global ASM_PFX(InternalMemSetMem32)
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ASM_PFX(InternalMemSetMem32):
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2022-01-10 14:46:27 +01:00
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movq mm0, r8
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2016-05-31 03:52:06 +02:00
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mov rax, rcx ; rax <- Buffer
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xchg rcx, rdx ; rcx <- Count rdx <- Buffer
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shr rcx, 1 ; rcx <- # of qwords to set
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jz @SetDwords
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2022-01-10 14:46:27 +01:00
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pshufw mm0, mm0, 44h
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2016-05-31 03:52:06 +02:00
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.0:
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2022-01-10 14:46:27 +01:00
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movntq [rdx], mm0
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2016-05-31 03:52:06 +02:00
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lea rdx, [rdx + 8] ; use "lea" to avoid flag changes
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loop .0
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mfence
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@SetDwords:
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jnc .1
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2022-01-10 14:46:27 +01:00
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movd [rdx], mm0
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2016-05-31 03:52:06 +02:00
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.1:
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ret
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