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;------------------------------------------------------------------------------
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;
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2015-04-27 21:37:15 +02:00
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; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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2010-04-23 18:00:47 +02:00
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; This program and the accompanying materials
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2007-06-22 05:21:45 +02:00
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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2010-06-11 02:02:51 +02:00
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; http://opensource.org/licenses/bsd-license.php.
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2007-06-22 05:21:45 +02:00
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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; Module Name:
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;
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; FlushCacheLine.Asm
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;
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; Abstract:
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;
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; AsmFlushCacheLine function
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;
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; Notes:
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;
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;------------------------------------------------------------------------------
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.586P
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.model flat,C
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.xmm
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.code
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;------------------------------------------------------------------------------
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; VOID *
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; EFIAPI
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; AsmFlushCacheLine (
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; IN VOID *LinearAddress
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; );
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;------------------------------------------------------------------------------
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AsmFlushCacheLine PROC
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2015-04-27 21:37:15 +02:00
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;
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; If the CPU does not support CLFLUSH instruction,
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; then promote flush range to flush entire cache.
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;
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mov eax, 1
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2015-04-30 09:25:07 +02:00
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push ebx
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2015-04-27 21:37:15 +02:00
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cpuid
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2015-04-30 09:25:07 +02:00
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pop ebx
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mov eax, [esp + 4]
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2015-04-27 21:37:15 +02:00
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test edx, BIT19
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jz @F
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clflush [eax]
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ret
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2015-04-27 21:37:15 +02:00
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@@:
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wbinvd
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ret
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2007-06-22 05:21:45 +02:00
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AsmFlushCacheLine ENDP
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END
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