2011-08-30 00:18:19 +02:00
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/** @file
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Set a IDT entry for debug purpose
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Set a IDT entry for interrupt vector 3 for debug purpose for IA32 platform
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2013-11-22 07:15:51 +01:00
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Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
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2011-08-30 00:18:19 +02:00
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2019-04-04 01:05:13 +02:00
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SPDX-License-Identifier: BSD-2-Clause-Patent
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2011-08-30 00:18:19 +02:00
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**/
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#include "ScriptExecute.h"
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/**
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Set a IDT entry for interrupt vector 3 for debug purpose.
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@param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT
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**/
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VOID
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SetIdtEntry (
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IN ACPI_S3_CONTEXT *AcpiS3Context
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)
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{
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2012-11-16 02:24:31 +01:00
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IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
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2011-08-30 00:18:19 +02:00
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IA32_DESCRIPTOR *IdtDescriptor;
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UINTN S3DebugBuffer;
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2013-11-22 07:15:51 +01:00
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EFI_STATUS Status;
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2011-08-30 00:18:19 +02:00
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//
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// Restore IDT for debug
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//
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IdtDescriptor = (IA32_DESCRIPTOR *) (UINTN) (AcpiS3Context->IdtrProfile);
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2012-08-16 06:36:24 +02:00
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AsmWriteIdtr (IdtDescriptor);
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2011-08-30 00:18:19 +02:00
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2012-08-16 06:36:24 +02:00
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//
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// Setup the default CPU exception handlers
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//
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2013-11-22 07:15:51 +01:00
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Status = InitializeCpuExceptionHandlers (NULL);
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ASSERT_EFI_ERROR (Status);
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2011-08-30 00:18:19 +02:00
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2012-08-16 06:36:24 +02:00
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DEBUG_CODE (
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//
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// Update IDT entry INT3 if the instruction is valid in it
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//
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S3DebugBuffer = (UINTN) (AcpiS3Context->S3DebugBufferAddress);
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if (*(UINTN *)S3DebugBuffer != (UINTN) -1) {
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2012-11-16 02:24:31 +01:00
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IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *)(IdtDescriptor->Base + (3 * sizeof (IA32_IDT_GATE_DESCRIPTOR)));
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IdtEntry->Bits.OffsetLow = (UINT16)S3DebugBuffer;
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IdtEntry->Bits.Selector = (UINT16)AsmReadCs ();
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IdtEntry->Bits.Reserved_0 = 0;
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IdtEntry->Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
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IdtEntry->Bits.OffsetHigh = (UINT16)(S3DebugBuffer >> 16);
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2012-08-16 06:36:24 +02:00
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}
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);
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2011-08-30 00:18:19 +02:00
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}
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