2009-05-27 23:10:18 +02:00
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/** @file
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ACPI Timer implements one instance of Timer Library.
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2012-10-04 22:58:21 +02:00
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Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>
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2011-07-27 17:13:54 +02:00
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Copyright (c) 2011, Andrei Warkentin <andreiw@motorola.com>
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2010-04-28 14:43:04 +02:00
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This program and the accompanying materials are
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2009-05-27 23:10:18 +02:00
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licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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2012-09-12 09:18:21 +02:00
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2009-05-27 23:10:18 +02:00
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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2012-09-12 09:18:21 +02:00
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**/
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2009-05-27 23:10:18 +02:00
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#include <Base.h>
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#include <Library/TimerLib.h>
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#include <Library/BaseLib.h>
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#include <Library/IoLib.h>
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#include <Library/PciLib.h>
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2011-07-27 17:13:54 +02:00
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#include <Library/DebugLib.h>
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2012-09-12 09:18:35 +02:00
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#include <Library/PcdLib.h>
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2012-09-12 09:19:04 +02:00
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#include <IndustryStandard/Pci22.h>
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2012-10-04 22:58:21 +02:00
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#include <IndustryStandard/Acpi.h>
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2011-07-27 17:13:54 +02:00
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//
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2012-10-04 22:58:21 +02:00
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// PCI Location of PIIX4 Power Management PCI Configuration Registers
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2011-07-27 17:13:54 +02:00
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//
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2012-10-04 22:58:21 +02:00
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#define PIIX4_POWER_MANAGEMENT_BUS 0x00
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#define PIIX4_POWER_MANAGEMENT_DEVICE 0x01
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#define PIIX4_POWER_MANAGEMENT_FUNCTION 0x03
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2009-05-27 23:10:18 +02:00
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2012-10-04 22:58:21 +02:00
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//
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// Macro to access PIIX4 Power Management PCI Configuration Registers
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//
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#define PIIX4_PCI_POWER_MANAGEMENT_REGISTER(Register) \
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PCI_LIB_ADDRESS ( \
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PIIX4_POWER_MANAGEMENT_BUS, \
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PIIX4_POWER_MANAGEMENT_DEVICE, \
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PIIX4_POWER_MANAGEMENT_FUNCTION, \
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Register \
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)
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//
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// PIIX4 Power Management PCI Configuration Registers
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//
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#define PMBA PIIX4_PCI_POWER_MANAGEMENT_REGISTER (0x40)
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#define PMBA_RTE BIT0
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#define PMREGMISC PIIX4_PCI_POWER_MANAGEMENT_REGISTER (0x80)
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#define PMIOSE BIT0
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//
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// The ACPI Time in the PIIX4 is a 24-bit counter
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//
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#define ACPI_TIMER_COUNT_SIZE BIT24
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//
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// Offset in the PIIX4 Power Management Base Address to the ACPI Timer
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//
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2011-07-27 17:13:54 +02:00
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#define ACPI_TIMER_OFFSET 0x8
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2009-05-27 23:10:18 +02:00
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/**
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The constructor function enables ACPI IO space.
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If ACPI I/O space not enabled, this function will enable it.
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It will always return RETURN_SUCCESS.
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@retval EFI_SUCCESS The constructor always returns RETURN_SUCCESS.
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**/
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RETURN_STATUS
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EFIAPI
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AcpiTimerLibConstructor (
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VOID
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)
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{
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//
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2012-10-04 22:58:21 +02:00
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// Check to see if the PIIX4 Power Management Base Address is already enabled
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2009-05-27 23:10:18 +02:00
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//
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2012-10-04 22:58:21 +02:00
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if ((PciRead8 (PMREGMISC) & PMIOSE) == 0) {
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//
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// If the PIIX4 Power Management Base Address is not programmed,
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// then program the PIIX4 Power Management Base Address from a PCD.
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//
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PciAndThenOr32 (PMBA, (UINT32)(~0x0000FFC0), PcdGet16 (PcdAcpiPmBaseAddress));
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//
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// Enable PMBA I/O port decodes in PMREGMISC
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//
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PciOr8 (PMREGMISC, PMIOSE);
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}
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2011-07-27 17:13:54 +02:00
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return RETURN_SUCCESS;
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2009-05-27 23:10:18 +02:00
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}
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/**
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Internal function to read the current tick counter of ACPI.
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Internal function to read the current tick counter of ACPI.
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@return The tick counter read.
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**/
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UINT32
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InternalAcpiGetTimerTick (
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VOID
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)
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{
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2012-10-04 22:58:21 +02:00
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//
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// Read PMBA to read and return the current ACPI timer value.
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//
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return IoRead32 ((PciRead32 (PMBA) & ~PMBA_RTE) + ACPI_TIMER_OFFSET);
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2009-05-27 23:10:18 +02:00
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}
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/**
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Stalls the CPU for at least the given number of ticks.
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Stalls the CPU for at least the given number of ticks. It's invoked by
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MicroSecondDelay() and NanoSecondDelay().
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@param Delay A period of time to delay in ticks.
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**/
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VOID
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InternalAcpiDelay (
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IN UINT32 Delay
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)
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{
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UINT32 Ticks;
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UINT32 Times;
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Times = Delay >> 22;
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Delay &= BIT22 - 1;
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do {
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//
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// The target timer count is calculated here
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//
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Ticks = InternalAcpiGetTimerTick () + Delay;
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Delay = BIT22;
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//
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// Wait until time out
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// Delay >= 2^23 could not be handled by this function
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// Timer wrap-arounds are handled correctly by this function
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//
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while (((Ticks - InternalAcpiGetTimerTick ()) & BIT23) == 0) {
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CpuPause ();
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}
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} while (Times-- > 0);
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}
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/**
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Stalls the CPU for at least the given number of microseconds.
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Stalls the CPU for the number of microseconds specified by MicroSeconds.
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@param MicroSeconds The minimum number of microseconds to delay.
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@return MicroSeconds
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**/
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UINTN
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EFIAPI
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MicroSecondDelay (
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IN UINTN MicroSeconds
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)
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{
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InternalAcpiDelay (
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(UINT32)DivU64x32 (
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MultU64x32 (
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MicroSeconds,
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ACPI_TIMER_FREQUENCY
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),
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1000000u
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)
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);
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return MicroSeconds;
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}
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/**
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Stalls the CPU for at least the given number of nanoseconds.
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Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
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@param NanoSeconds The minimum number of nanoseconds to delay.
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@return NanoSeconds
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**/
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UINTN
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EFIAPI
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NanoSecondDelay (
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IN UINTN NanoSeconds
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)
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{
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InternalAcpiDelay (
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(UINT32)DivU64x32 (
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MultU64x32 (
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NanoSeconds,
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ACPI_TIMER_FREQUENCY
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),
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1000000000u
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)
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);
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return NanoSeconds;
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}
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/**
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Retrieves the current value of a 64-bit free running performance counter.
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Retrieves the current value of a 64-bit free running performance counter. The
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counter can either count up by 1 or count down by 1. If the physical
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performance counter counts by a larger increment, then the counter values
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must be translated. The properties of the counter can be retrieved from
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GetPerformanceCounterProperties().
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@return The current value of the free running performance counter.
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**/
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UINT64
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EFIAPI
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GetPerformanceCounter (
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VOID
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)
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{
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return (UINT64)InternalAcpiGetTimerTick ();
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}
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/**
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Retrieves the 64-bit frequency in Hz and the range of performance counter
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values.
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If StartValue is not NULL, then the value that the performance counter starts
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with immediately after is it rolls over is returned in StartValue. If
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EndValue is not NULL, then the value that the performance counter end with
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immediately before it rolls over is returned in EndValue. The 64-bit
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frequency of the performance counter in Hz is always returned. If StartValue
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is less than EndValue, then the performance counter counts up. If StartValue
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is greater than EndValue, then the performance counter counts down. For
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example, a 64-bit free running counter that counts up would have a StartValue
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of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
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that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
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@param StartValue The value the performance counter starts with when it
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rolls over.
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@param EndValue The value that the performance counter ends with before
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it rolls over.
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@return The frequency in Hz.
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**/
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UINT64
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EFIAPI
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GetPerformanceCounterProperties (
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OUT UINT64 *StartValue, OPTIONAL
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OUT UINT64 *EndValue OPTIONAL
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)
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{
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if (StartValue != NULL) {
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*StartValue = 0;
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}
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if (EndValue != NULL) {
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*EndValue = ACPI_TIMER_COUNT_SIZE - 1;
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}
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return ACPI_TIMER_FREQUENCY;
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}
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2011-08-25 07:59:17 +02:00
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/**
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Converts elapsed ticks of performance counter to time in nanoseconds.
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This function converts the elapsed ticks of running performance counter to
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time value in unit of nanoseconds.
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@param Ticks The number of elapsed ticks of running performance counter.
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@return The elapsed time in nanoseconds.
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**/
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UINT64
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EFIAPI
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GetTimeInNanoSecond (
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IN UINT64 Ticks
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)
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{
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UINT64 NanoSeconds;
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UINT32 Remainder;
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//
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// Ticks
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// Time = --------- x 1,000,000,000
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// Frequency
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//
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NanoSeconds = MultU64x32 (DivU64x32Remainder (Ticks, ACPI_TIMER_FREQUENCY, &Remainder), 1000000000u);
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//
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// Frequency < 0x100000000, so Remainder < 0x100000000, then (Remainder * 1,000,000,000)
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// will not overflow 64-bit.
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//
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NanoSeconds += DivU64x32 (MultU64x32 ((UINT64) Remainder, 1000000000u), ACPI_TIMER_FREQUENCY);
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return NanoSeconds;
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}
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