2009-12-06 02:57:05 +01:00
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/** @file
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Macros to work around lack of Apple support for LDR register, =expr
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2010-04-29 14:15:47 +02:00
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Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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2012-02-28 18:23:53 +01:00
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Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
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2009-12-06 02:57:05 +01:00
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2010-04-29 14:15:47 +02:00
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This program and the accompanying materials
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2009-12-06 02:57:05 +01:00
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef __MACRO_IO_LIB_H__
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#define __MACRO_IO_LIB_H__
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#if defined(__APPLE__)
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//
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// ldr reg, =expr does not work with current Apple tool chain. So do the work our selves
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//
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// returns _Data in R0 and _Address in R1
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#define MmioWrite32(_Address, _Data) \
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ldr r1, [pc, #8] ; \
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ldr r0, [pc, #8] ; \
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str r0, [r1] ; \
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b 1f ; \
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.long (_Address) ; \
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.long (_Data) ; \
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1:
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// returns _Data in R0 and _Address in R1, and _OrData in r2
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#define MmioOr32(_Address, _OrData) \
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ldr r1, [pc, #16] ; \
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ldr r2, [pc, #16] ; \
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ldr r0, [r1] ; \
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orr r0, r0, r2 ; \
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str r0, [r1] ; \
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b 1f ; \
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.long (_Address) ; \
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.long (_OrData) ; \
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1:
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// returns _Data in R0 and _Address in R1, and _OrData in r2
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#define MmioAnd32(_Address, _AndData) \
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ldr r1, [pc, #16] ; \
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ldr r2, [pc, #16] ; \
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ldr r0, [r1] ; \
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and r0, r0, r2 ; \
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str r0, [r1] ; \
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b 1f ; \
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.long (_Address) ; \
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.long (_AndData) ; \
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1:
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// returns result in R0, _Address in R1, and _OrData in r2
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#define MmioAndThenOr32(_Address, _AndData, _OrData) \
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ldr r1, [pc, #24] ; \
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ldr r0, [r1] ; \
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ldr r2, [pc, #20] ; \
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and r0, r0, r2 ; \
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ldr r2, [pc, #16] ; \
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orr r0, r0, r2 ; \
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str r0, [r1] ; \
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b 1f ; \
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.long (_Address) ; \
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.long (_AndData) ; \
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.long (_OrData) ; \
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1:
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// returns _Data in _Reg and _Address in R1
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#define MmioWriteFromReg32(_Address, _Reg) \
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ldr r1, [pc, #4] ; \
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str _Reg, [r1] ; \
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b 1f ; \
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.long (_Address) ; \
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1:
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// returns _Data in R0 and _Address in R1
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#define MmioRead32(_Address) \
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ldr r1, [pc, #4] ; \
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ldr r0, [r1] ; \
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b 1f ; \
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.long (_Address) ; \
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1:
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// returns _Data in Reg and _Address in R1
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#define MmioReadToReg32(_Address, _Reg) \
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ldr r1, [pc, #4] ; \
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ldr _Reg, [r1] ; \
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b 1f ; \
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.long (_Address) ; \
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1:
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// load R0 with _Data
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#define LoadConstant(_Data) \
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ldr r0, [pc, #0] ; \
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b 1f ; \
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.long (_Data) ; \
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1:
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// load _Reg with _Data
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#define LoadConstantToReg(_Data, _Reg) \
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ldr _Reg, [pc, #0] ; \
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b 1f ; \
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.long (_Data) ; \
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// load _Reg with _Data if eq
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#define LoadConstantToRegIfEq(_Data, _Reg) \
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ldreq _Reg, [pc, #0] ; \
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b 1f ; \
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.long (_Data) ; \
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1:
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2011-10-04 15:58:28 +02:00
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// Convert the (ClusterId,CoreId) into a Core Position
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// We assume there are 4 cores per cluster
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2012-07-04 22:10:18 +02:00
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#define GetCorePositionFromMpId(Pos, MpId, Tmp) \
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2011-10-04 15:58:28 +02:00
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lsr Pos, MpId, #6 ; \
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and Tmp, MpId, #3 ; \
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add Pos, Pos, Tmp
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// Reserve a region at the top of the Primary Core stack
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// for Global variables for the XIP phase
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#define SetPrimaryStack(StackTop, GlobalSize, Tmp) \
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and Tmp, GlobalSize, #7 ; \
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rsbne Tmp, Tmp, #8 ; \
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add GlobalSize, GlobalSize, Tmp ; \
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2012-02-28 18:23:53 +01:00
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sub sp, StackTop, GlobalSize ; \
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; \
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mov Tmp, sp ; \
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mov GlobalSize, #0x0 ; \
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_SetPrimaryStackInitGlobals: ; \
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cmp Tmp, StackTop ; \
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beq _SetPrimaryStackEnd ; \
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str GlobalSize, [Tmp], #4 ; \
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b _SetPrimaryStackInitGlobals ; \
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_SetPrimaryStackEnd:
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2011-10-04 15:58:28 +02:00
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2009-12-06 02:57:05 +01:00
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#elif defined (__GNUC__)
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#define MmioWrite32(Address, Data) \
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ldr r1, =Address ; \
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ldr r0, =Data ; \
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str r0, [r1]
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#define MmioOr32(Address, OrData) \
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ldr r1, =Address ; \
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ldr r2, =OrData ; \
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ldr r0, [r1] ; \
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orr r0, r0, r2 ; \
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str r0, [r1]
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#define MmioAnd32(Address, AndData) \
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ldr r1, =Address ; \
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ldr r2, =AndData ; \
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ldr r0, [r1] ; \
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and r0, r0, r2 ; \
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str r0, [r1]
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#define MmioAndThenOr32(Address, AndData, OrData) \
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ldr r1, =Address ; \
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ldr r0, [r1] ; \
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ldr r2, =AndData ; \
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and r0, r0, r2 ; \
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ldr r2, =OrData ; \
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orr r0, r0, r2 ; \
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str r0, [r1]
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#define MmioWriteFromReg32(Address, Reg) \
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ldr r1, =Address ; \
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str Reg, [r1]
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#define MmioRead32(Address) \
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ldr r1, =Address ; \
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ldr r0, [r1]
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#define MmioReadToReg32(Address, Reg) \
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ldr r1, =Address ; \
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ldr Reg, [r1]
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#define LoadConstant(Data) \
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ldr r0, =Data
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#define LoadConstantToReg(Data, Reg) \
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ldr Reg, =Data
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2012-07-04 22:10:18 +02:00
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#define GetCorePositionFromMpId(Pos, MpId, Tmp) \
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2011-09-23 01:05:20 +02:00
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lsr Pos, MpId, #6 ; \
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and Tmp, MpId, #3 ; \
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add Pos, Pos, Tmp
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#define SetPrimaryStack(StackTop, GlobalSize, Tmp) \
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and Tmp, GlobalSize, #7 ; \
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rsbne Tmp, Tmp, #8 ; \
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add GlobalSize, GlobalSize, Tmp ; \
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sub sp, StackTop, GlobalSize ; \
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; \
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mov Tmp, sp ; \
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mov GlobalSize, #0x0 ; \
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_SetPrimaryStackInitGlobals: ; \
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cmp Tmp, StackTop ; \
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beq _SetPrimaryStackEnd ; \
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str GlobalSize, [Tmp], #4 ; \
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b _SetPrimaryStackInitGlobals ; \
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_SetPrimaryStackEnd:
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2011-09-23 01:05:20 +02:00
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2009-12-06 02:57:05 +01:00
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#else
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//
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// Use ARM assembly macros, form armasam
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//
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// Less magic in the macros if ldr reg, =expr works
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//
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// returns _Data in R0 and _Address in R1
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#define MmioWrite32(Address, Data) MmioWrite32Macro Address, Data
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// returns Data in R0 and Address in R1, and OrData in r2
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#define MmioOr32(Address, OrData) MmioOr32Macro Address, OrData
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// returns _Data in R0 and _Address in R1, and _OrData in r2
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#define MmioAnd32(Address, AndData) MmioAnd32Macro Address, AndData
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// returns result in R0, _Address in R1, and _OrData in r2
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#define MmioAndThenOr32(Address, AndData, OrData) MmioAndThenOr32Macro Address, AndData, OrData
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// returns _Data in _Reg and _Address in R1
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#define MmioWriteFromReg32(Address, Reg) MmioWriteFromReg32Macro Address, Reg
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// returns _Data in R0 and _Address in R1
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#define MmioRead32(Address) MmioRead32Macro Address
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// returns _Data in Reg and _Address in R1
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#define MmioReadToReg32(Address, Reg) MmioReadToReg32Macro Address, Reg
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// load R0 with _Data
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#define LoadConstant(Data) LoadConstantMacro Data
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// load _Reg with _Data
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#define LoadConstantToReg(Data, Reg) LoadConstantToRegMacro Data, Reg
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// conditional load testing eq flag
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#define LoadConstantToRegIfEq(Data, Reg) LoadConstantToRegIfEqMacro Data, Reg
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2012-07-04 22:10:18 +02:00
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#define GetCorePositionFromMpId(Pos, MpId, Tmp) GetCorePositionFromMpId Pos, MpId, Tmp
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2009-12-06 02:57:05 +01:00
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2011-09-23 01:05:20 +02:00
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#define SetPrimaryStack(StackTop,GlobalSize,Tmp) SetPrimaryStack StackTop, GlobalSize, Tmp
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2009-12-06 02:57:05 +01:00
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2011-09-23 01:05:20 +02:00
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#endif
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2009-12-06 02:57:05 +01:00
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#endif
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