2013-07-18 21:06:52 +02:00
|
|
|
/** @file
|
|
|
|
*
|
2017-05-16 12:10:45 +02:00
|
|
|
* Copyright (c) 2011-2017, ARM Limited. All rights reserved.
|
2013-07-18 21:06:52 +02:00
|
|
|
*
|
2019-04-04 01:03:21 +02:00
|
|
|
* SPDX-License-Identifier: BSD-2-Clause-Patent
|
2013-07-18 21:06:52 +02:00
|
|
|
*
|
|
|
|
**/
|
|
|
|
|
|
|
|
#include "PrePi.h"
|
|
|
|
|
|
|
|
#include <Chipset/AArch64.h>
|
|
|
|
|
|
|
|
VOID
|
|
|
|
ArchInitialize (
|
|
|
|
VOID
|
|
|
|
)
|
|
|
|
{
|
|
|
|
// Enable Floating Point
|
|
|
|
if (FixedPcdGet32 (PcdVFPEnabled)) {
|
|
|
|
ArmEnableVFP ();
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ArmReadCurrentEL () == AARCH64_EL2) {
|
|
|
|
// Trap General Exceptions. All exceptions that would be routed to EL1 are routed to EL2
|
|
|
|
ArmWriteHcr (ARM_HCR_TGE);
|
2017-05-16 12:10:45 +02:00
|
|
|
|
|
|
|
/* Enable Timer access for non-secure EL1 and EL0
|
|
|
|
The cnthctl_el2 register bits are architecturally
|
|
|
|
UNKNOWN on reset.
|
|
|
|
Disable event stream as it is not in use at this stage
|
|
|
|
*/
|
|
|
|
ArmWriteCntHctl (CNTHCTL_EL2_EL1PCTEN | CNTHCTL_EL2_EL1PCEN);
|
2013-07-18 21:06:52 +02:00
|
|
|
}
|
|
|
|
}
|