mirror of https://github.com/acidanthera/audk.git
IntelFsp2Pkg/FspSecCore: Use UefiCpuLib.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2825 UefiCpuLib has API InitializeFloatingPointUnits. Remove internal copy of InitializeFloatingPointUnits in FspSecCoreM, use UefiCpuLib API. This change also avoid later potential conflict when use UefiCpuLib for FspSecCoreM module. Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Star Zeng <star.zeng@intel.com>
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@ -29,7 +29,6 @@
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[Sources.IA32]
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Ia32/Stack.nasm
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Ia32/InitializeFpu.nasm
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Ia32/FspApiEntryM.nasm
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Ia32/FspApiEntryCommon.nasm
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Ia32/FspHelper.nasm
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@ -41,6 +40,7 @@
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[Packages]
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MdePkg/MdePkg.dec
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IntelFsp2Pkg/IntelFsp2Pkg.dec
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UefiCpuPkg/UefiCpuPkg.dec
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[LibraryClasses]
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BaseMemoryLib
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@ -51,6 +51,7 @@
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FspSwitchStackLib
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FspCommonLib
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FspSecPlatformLib
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UefiCpuLib
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[Pcd]
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gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase ## CONSUMES
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@ -25,7 +25,6 @@
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[Sources.IA32]
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Ia32/Stack.nasm
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Ia32/InitializeFpu.nasm
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Ia32/FspApiEntryT.nasm
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Ia32/FspHelper.nasm
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@ -1,72 +0,0 @@
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;------------------------------------------------------------------------------
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;
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; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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; Abstract:
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;
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;------------------------------------------------------------------------------
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SECTION .data
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;
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; Float control word initial value:
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; all exceptions masked, double-precision, round-to-nearest
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;
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ASM_PFX(mFpuControlWord):
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dw 0x027F
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;
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; Multimedia-extensions control word:
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; all exceptions masked, round-to-nearest, flush to zero for masked underflow
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;
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ASM_PFX(mMmxControlWord):
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dd 0x01F80
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SECTION .text
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;
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; Initializes floating point units for requirement of UEFI specification.
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;
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; This function initializes floating-point control word to 0x027F (all exceptions
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; masked,double-precision, round-to-nearest) and multimedia-extensions control word
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; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
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; for masked underflow).
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;
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global ASM_PFX(InitializeFloatingPointUnits)
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ASM_PFX(InitializeFloatingPointUnits):
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push ebx
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;
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; Initialize floating point units
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;
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finit
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fldcw [ASM_PFX(mFpuControlWord)]
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;
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; Use CpuId instruction (CPUID.01H:EDX.SSE[bit 25] = 1) to test
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; whether the processor supports SSE instruction.
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;
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mov eax, 1
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cpuid
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bt edx, 25
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jnc Done
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;
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; Set OSFXSR bit 9 in CR4
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;
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mov eax, cr4
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or eax, BIT9
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mov cr4, eax
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;
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; The processor should support SSE instruction and we can use
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; ldmxcsr instruction
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;
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ldmxcsr [ASM_PFX(mMmxControlWord)]
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Done:
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pop ebx
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ret
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@ -21,6 +21,7 @@
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#include <Library/SerialPortLib.h>
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#include <Library/FspSwitchStackLib.h>
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#include <Library/FspCommonLib.h>
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#include <Library/UefiCpuLib.h>
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#include <FspEas.h>
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typedef VOID (*PEI_CORE_ENTRY) ( \
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@ -80,20 +81,6 @@ SecTemporaryRamSupport (
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IN UINTN CopySize
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);
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/**
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Initializes floating point units for requirement of UEFI specification.
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This function initializes floating-point control word to 0x027F (all exceptions
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masked,double-precision, round-to-nearest) and multimedia-extensions control word
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(if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
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for masked underflow).
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**/
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VOID
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EFIAPI
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InitializeFloatingPointUnits (
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VOID
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);
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/**
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@ -25,6 +25,7 @@
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PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf
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IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
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UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
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UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
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ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf
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PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
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