tyler.durden
/
audk
mirror of https://github.com/acidanthera/audk.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

UefiCpuPkg: Refactor initialization of CPU features during S3 resume 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3621
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3631

Refactor initialization of CPU features during S3 resume.

In addition, the macro ACPI_CPU_DATA_STRUCTURE_UPDATE is used to fix
incompatibility issue caused by ACPI_CPU_DATA structure update. It will
be removed after all the platform code uses new ACPI_CPU_DATA structure.

Signed-off-by: Jason Lou <yun.lou@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
This commit is contained in:
Lou, Yun 2021-09-16 17:27:11 +08:00 committed by mergify[bot]
parent bda3546c55
commit 010753b7e7
6 changed files with 165 additions and 128 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
OvmfPkg/CpuS3DataDxe/CpuS3Data.c
View File

@ -9,7 +9,7 @@ number of CPUs reported by the MP Services Protocol, so this module does not
support hot plug CPUs. This module can be copied into a CPU specific package support hot plug CPUs. This module can be copied into a CPU specific package
and customized if these additional features are required. and customized if these additional features are required.
Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.<BR> Copyright (c) 2013 - 2021, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015 - 2020, Red Hat, Inc. Copyright (c) 2015 - 2020, Red Hat, Inc.
SPDX-License-Identifier: BSD-2-Clause-Patent SPDX-License-Identifier: BSD-2-Clause-Patent
@ -252,10 +252,7 @@ CpuS3DataInitialize (
AcpiCpuDataEx->IdtrProfile.Base = (UINTN)Idt; AcpiCpuDataEx->IdtrProfile.Base = (UINTN)Idt;
if (OldAcpiCpuData != NULL) { if (OldAcpiCpuData != NULL) {
AcpiCpuData->RegisterTable = OldAcpiCpuData->RegisterTable; CopyMem (&AcpiCpuData->CpuFeatureInitData, &OldAcpiCpuData->CpuFeatureInitData, sizeof (CPU_FEATURE_INIT_DATA));
AcpiCpuData->PreSmmInitRegisterTable = OldAcpiCpuData->PreSmmInitRegisterTable;
AcpiCpuData->ApLocation = OldAcpiCpuData->ApLocation;
CopyMem (&AcpiCpuData->CpuStatus, &OldAcpiCpuData->CpuStatus, sizeof (CPU_STATUS_INFORMATION));
} }
// //

7
UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c
View File

@ -9,7 +9,7 @@ number of CPUs reported by the MP Services Protocol, so this module does not
support hot plug CPUs. This module can be copied into a CPU specific package support hot plug CPUs. This module can be copied into a CPU specific package
and customized if these additional features are required. and customized if these additional features are required.
Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.<BR> Copyright (c) 2013 - 2021, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015, Red Hat, Inc. Copyright (c) 2015, Red Hat, Inc.
SPDX-License-Identifier: BSD-2-Clause-Patent SPDX-License-Identifier: BSD-2-Clause-Patent
@ -247,10 +247,7 @@ CpuS3DataInitialize (
AcpiCpuDataEx->IdtrProfile.Base = (UINTN)Idt; AcpiCpuDataEx->IdtrProfile.Base = (UINTN)Idt;
if (OldAcpiCpuData != NULL) { if (OldAcpiCpuData != NULL) {
AcpiCpuData->RegisterTable = OldAcpiCpuData->RegisterTable; CopyMem (&AcpiCpuData->CpuFeatureInitData, &OldAcpiCpuData->CpuFeatureInitData, sizeof (CPU_FEATURE_INIT_DATA));
AcpiCpuData->PreSmmInitRegisterTable = OldAcpiCpuData->PreSmmInitRegisterTable;
AcpiCpuData->ApLocation = OldAcpiCpuData->ApLocation;
CopyMem (&AcpiCpuData->CpuStatus, &OldAcpiCpuData->CpuStatus, sizeof (CPU_STATUS_INFORMATION));
} }
// //

89
UefiCpuPkg/Include/AcpiCpuData.h
View File

@ -1,7 +1,7 @@
/** @file /** @file
Definitions for CPU S3 data. Definitions for CPU S3 data.
Copyright (c) 2013 - 2020, Intel Corporation. All rights reserved.<BR> Copyright (c) 2013 - 2021, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent SPDX-License-Identifier: BSD-2-Clause-Patent
**/ **/
@ -9,6 +9,13 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#ifndef _ACPI_CPU_DATA_H_ #ifndef _ACPI_CPU_DATA_H_
#define _ACPI_CPU_DATA_H_ #define _ACPI_CPU_DATA_H_
//
// This macro definition is used to fix incompatibility issue caused by
// ACPI_CPU_DATA structure update. It will be removed after all the platform
// code uses new ACPI_CPU_DATA structure.
//
#define ACPI_CPU_DATA_STRUCTURE_UPDATE
// //
// Register types in register table // Register types in register table
// //
@ -118,6 +125,49 @@ typedef struct {
EFI_PHYSICAL_ADDRESS RegisterTableEntry; EFI_PHYSICAL_ADDRESS RegisterTableEntry;
} CPU_REGISTER_TABLE; } CPU_REGISTER_TABLE;
//
// Data structure that is used for CPU feature initialization during ACPI S3
// resume.
//
typedef struct {
//
// Physical address of an array of CPU_REGISTER_TABLE structures, with
// NumberOfCpus entries. If a register table is not required, then the
// TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set to 0.
// If TableLength is > 0, then elements of RegisterTableEntry are used to
// initialize the CPU that matches InitialApicId, during an ACPI S3 resume,
// before SMBASE relocation is performed.
// If a register table is not required for any one of the CPUs, then
// PreSmmInitRegisterTable may be set to 0.
//
EFI_PHYSICAL_ADDRESS PreSmmInitRegisterTable;
//
// Physical address of an array of CPU_REGISTER_TABLE structures, with
// NumberOfCpus entries. If a register table is not required, then the
// TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set to 0.
// If TableLength is > 0, then elements of RegisterTableEntry are used to
// initialize the CPU that matches InitialApicId, during an ACPI S3 resume,
// after SMBASE relocation is performed.
// If a register table is not required for any one of the CPUs, then
// RegisterTable may be set to 0.
//
EFI_PHYSICAL_ADDRESS RegisterTable;
//
// CPU information which is required when set the register table.
//
CPU_STATUS_INFORMATION CpuStatus;
//
// Location info for each AP.
// It points to an array which saves all APs location info.
// The array count is the AP count in this CPU.
//
// If the platform does not support MSR setting at S3 resume, and
// therefore it doesn't need the dependency semaphores, it should set
// this field to 0.
//
EFI_PHYSICAL_ADDRESS ApLocation;
} CPU_FEATURE_INIT_DATA;
// //
// Data structure that is required for ACPI S3 resume. The PCD // Data structure that is required for ACPI S3 resume. The PCD
// PcdCpuS3DataAddress must be set to the physical address where this structure // PcdCpuS3DataAddress must be set to the physical address where this structure
@ -172,28 +222,6 @@ typedef struct {
// //
EFI_PHYSICAL_ADDRESS MtrrTable; EFI_PHYSICAL_ADDRESS MtrrTable;
// //
// Physical address of an array of CPU_REGISTER_TABLE structures, with
// NumberOfCpus entries. If a register table is not required, then the
// TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set to 0.
// If TableLength is > 0, then elements of RegisterTableEntry are used to
// initialize the CPU that matches InitialApicId, during an ACPI S3 resume,
// before SMBASE relocation is performed.
// If a register table is not required for any one of the CPUs, then
// PreSmmInitRegisterTable may be set to 0.
//
EFI_PHYSICAL_ADDRESS PreSmmInitRegisterTable;
//
// Physical address of an array of CPU_REGISTER_TABLE structures, with
// NumberOfCpus entries. If a register table is not required, then the
// TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set to 0.
// If TableLength is > 0, then elements of RegisterTableEntry are used to
// initialize the CPU that matches InitialApicId, during an ACPI S3 resume,
// after SMBASE relocation is performed.
// If a register table is not required for any one of the CPUs, then
// RegisterTable may be set to 0.
//
EFI_PHYSICAL_ADDRESS RegisterTable;
//
// Physical address of a buffer that contains the machine check handler that // Physical address of a buffer that contains the machine check handler that
// is used during an ACPI S3 Resume. In order for this machine check // is used during an ACPI S3 Resume. In order for this machine check
// handler to be active on an AP during an ACPI S3 resume, the machine check // handler to be active on an AP during an ACPI S3 resume, the machine check
@ -208,19 +236,10 @@ typedef struct {
// //
UINT32 ApMachineCheckHandlerSize; UINT32 ApMachineCheckHandlerSize;
// //
// CPU information which is required when set the register table. // Data structure that is used for CPU feature initialization during ACPI S3
// resume.
// //
CPU_STATUS_INFORMATION CpuStatus; CPU_FEATURE_INIT_DATA CpuFeatureInitData;
//
// Location info for each AP.
// It points to an array which saves all APs location info.
// The array count is the AP count in this CPU.
//
// If the platform does not support MSR setting at S3 resume, and
// therefore it doesn't need the dependency semaphores, it should set
// this field to 0.
//
EFI_PHYSICAL_ADDRESS ApLocation;
} ACPI_CPU_DATA; } ACPI_CPU_DATA;
#endif #endif

12
UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
View File

@ -1,7 +1,7 @@
/** @file /** @file
CPU Features Initialize functions. CPU Features Initialize functions.
Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved.<BR> Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent SPDX-License-Identifier: BSD-2-Clause-Patent
**/ **/
@ -152,10 +152,10 @@ CpuInitDataInitialize (
ASSERT (AcpiCpuData != NULL); ASSERT (AcpiCpuData != NULL);
CpuFeaturesData->AcpiCpuData= AcpiCpuData; CpuFeaturesData->AcpiCpuData= AcpiCpuData;
CpuStatus = &AcpiCpuData->CpuStatus; CpuStatus = &AcpiCpuData->CpuFeatureInitData.CpuStatus;
Location = AllocateZeroPool (sizeof (EFI_CPU_PHYSICAL_LOCATION) * NumberOfCpus); Location = AllocateZeroPool (sizeof (EFI_CPU_PHYSICAL_LOCATION) * NumberOfCpus);
ASSERT (Location != NULL); ASSERT (Location != NULL);
AcpiCpuData->ApLocation = (EFI_PHYSICAL_ADDRESS)(UINTN)Location; AcpiCpuData->CpuFeatureInitData.ApLocation = (EFI_PHYSICAL_ADDRESS)(UINTN)Location;
for (ProcessorNumber = 0; ProcessorNumber < NumberOfCpus; ProcessorNumber++) { for (ProcessorNumber = 0; ProcessorNumber < NumberOfCpus; ProcessorNumber++) {
InitOrder = &CpuFeaturesData->InitOrder[ProcessorNumber]; InitOrder = &CpuFeaturesData->InitOrder[ProcessorNumber];
@ -1131,7 +1131,7 @@ SetProcessorRegister (
CpuFeaturesData = (CPU_FEATURES_DATA *) Buffer; CpuFeaturesData = (CPU_FEATURES_DATA *) Buffer;
AcpiCpuData = CpuFeaturesData->AcpiCpuData; AcpiCpuData = CpuFeaturesData->AcpiCpuData;
RegisterTables = (CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->RegisterTable; RegisterTables = (CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->CpuFeatureInitData.RegisterTable;
InitApicId = GetInitialApicId (); InitApicId = GetInitialApicId ();
RegisterTable = NULL; RegisterTable = NULL;
@ -1147,8 +1147,8 @@ SetProcessorRegister (
ProgramProcessorRegister ( ProgramProcessorRegister (
RegisterTable, RegisterTable,
(EFI_CPU_PHYSICAL_LOCATION *)(UINTN)AcpiCpuData->ApLocation + ProcIndex, (EFI_CPU_PHYSICAL_LOCATION *)(UINTN)AcpiCpuData->CpuFeatureInitData.ApLocation + ProcIndex,
&AcpiCpuData->CpuStatus, &AcpiCpuData->CpuFeatureInitData.CpuStatus,
&CpuFeaturesData->CpuFlags &CpuFeaturesData->CpuFlags
); );
} }

18
UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c
View File

@ -952,8 +952,8 @@ GetAcpiCpuData (
AcpiCpuData->NumberOfCpus = (UINT32)NumberOfCpus; AcpiCpuData->NumberOfCpus = (UINT32)NumberOfCpus;
} }
if (AcpiCpuData->RegisterTable == 0 || if (AcpiCpuData->CpuFeatureInitData.RegisterTable == 0 ||
AcpiCpuData->PreSmmInitRegisterTable == 0) { AcpiCpuData->CpuFeatureInitData.PreSmmInitRegisterTable == 0) {
// //
// Allocate buffer for empty RegisterTable and PreSmmInitRegisterTable for all CPUs // Allocate buffer for empty RegisterTable and PreSmmInitRegisterTable for all CPUs
// //
@ -976,11 +976,11 @@ GetAcpiCpuData (
RegisterTable[NumberOfCpus + Index].AllocatedSize = 0; RegisterTable[NumberOfCpus + Index].AllocatedSize = 0;
RegisterTable[NumberOfCpus + Index].RegisterTableEntry = 0; RegisterTable[NumberOfCpus + Index].RegisterTableEntry = 0;
} }
if (AcpiCpuData->RegisterTable == 0) { if (AcpiCpuData->CpuFeatureInitData.RegisterTable == 0) {
AcpiCpuData->RegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)RegisterTable; AcpiCpuData->CpuFeatureInitData.RegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)RegisterTable;
} }
if (AcpiCpuData->PreSmmInitRegisterTable == 0) { if (AcpiCpuData->CpuFeatureInitData.PreSmmInitRegisterTable == 0) {
AcpiCpuData->PreSmmInitRegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)(RegisterTable + NumberOfCpus); AcpiCpuData->CpuFeatureInitData.PreSmmInitRegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)(RegisterTable + NumberOfCpus);
} }
} }
@ -1063,9 +1063,9 @@ CpuRegisterTableWriteWorker (
CpuFeaturesData = GetCpuFeaturesData (); CpuFeaturesData = GetCpuFeaturesData ();
if (CpuFeaturesData->RegisterTable == NULL) { if (CpuFeaturesData->RegisterTable == NULL) {
AcpiCpuData = GetAcpiCpuData (); AcpiCpuData = GetAcpiCpuData ();
ASSERT ((AcpiCpuData != NULL) && (AcpiCpuData->RegisterTable != 0)); ASSERT ((AcpiCpuData != NULL) && (AcpiCpuData->CpuFeatureInitData.RegisterTable != 0));
CpuFeaturesData->RegisterTable = (CPU_REGISTER_TABLE *) (UINTN) AcpiCpuData->RegisterTable; CpuFeaturesData->RegisterTable = (CPU_REGISTER_TABLE *) (UINTN) AcpiCpuData->CpuFeatureInitData.RegisterTable;
CpuFeaturesData->PreSmmRegisterTable = (CPU_REGISTER_TABLE *) (UINTN) AcpiCpuData->PreSmmInitRegisterTable; CpuFeaturesData->PreSmmRegisterTable = (CPU_REGISTER_TABLE *) (UINTN) AcpiCpuData->CpuFeatureInitData.PreSmmInitRegisterTable;
} }
if (PreSmmFlag) { if (PreSmmFlag) {

160
UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
View File

@ -476,16 +476,19 @@ SetRegister (
IN BOOLEAN PreSmmRegisterTable IN BOOLEAN PreSmmRegisterTable
) )
{ {
CPU_FEATURE_INIT_DATA *FeatureInitData;
CPU_REGISTER_TABLE *RegisterTable; CPU_REGISTER_TABLE *RegisterTable;
CPU_REGISTER_TABLE *RegisterTables; CPU_REGISTER_TABLE *RegisterTables;
UINT32 InitApicId; UINT32 InitApicId;
UINTN ProcIndex; UINTN ProcIndex;
UINTN Index; UINTN Index;
FeatureInitData = &mAcpiCpuData.CpuFeatureInitData;
if (PreSmmRegisterTable) { if (PreSmmRegisterTable) {
RegisterTables = (CPU_REGISTER_TABLE *)(UINTN)mAcpiCpuData.PreSmmInitRegisterTable; RegisterTables = (CPU_REGISTER_TABLE *)(UINTN)FeatureInitData->PreSmmInitRegisterTable;
} else { } else {
RegisterTables = (CPU_REGISTER_TABLE *)(UINTN)mAcpiCpuData.RegisterTable; RegisterTables = (CPU_REGISTER_TABLE *)(UINTN)FeatureInitData->RegisterTable;
} }
if (RegisterTables == NULL) { if (RegisterTables == NULL) {
return; return;
@ -503,18 +506,18 @@ SetRegister (
} }
ASSERT (RegisterTable != NULL); ASSERT (RegisterTable != NULL);
if (mAcpiCpuData.ApLocation != 0) { if (FeatureInitData->ApLocation != 0) {
ProgramProcessorRegister ( ProgramProcessorRegister (
RegisterTable, RegisterTable,
(EFI_CPU_PHYSICAL_LOCATION *)(UINTN)mAcpiCpuData.ApLocation + ProcIndex, (EFI_CPU_PHYSICAL_LOCATION *)(UINTN)FeatureInitData->ApLocation + ProcIndex,
&mAcpiCpuData.CpuStatus, &FeatureInitData->CpuStatus,
&mCpuFlags &mCpuFlags
); );
} else { } else {
ProgramProcessorRegister ( ProgramProcessorRegister (
RegisterTable, RegisterTable,
NULL, NULL,
&mAcpiCpuData.CpuStatus, &FeatureInitData->CpuStatus,
&mCpuFlags &mCpuFlags
); );
} }
@ -1010,6 +1013,71 @@ IsRegisterTableEmpty (
return TRUE; return TRUE;
} }
/**
Copy the data used to initialize processor register into SMRAM.
@param[in,out] CpuFeatureInitDataDst Pointer to the destination CPU_FEATURE_INIT_DATA structure.
@param[in] CpuFeatureInitDataSrc Pointer to the source CPU_FEATURE_INIT_DATA structure.
**/
VOID
CopyCpuFeatureInitDatatoSmram (
IN OUT CPU_FEATURE_INIT_DATA *CpuFeatureInitDataDst,
IN CPU_FEATURE_INIT_DATA *CpuFeatureInitDataSrc
)
{
CPU_STATUS_INFORMATION *CpuStatus;
if (!IsRegisterTableEmpty ((CPU_REGISTER_TABLE *)(UINTN)CpuFeatureInitDataSrc->PreSmmInitRegisterTable, mAcpiCpuData.NumberOfCpus)) {
CpuFeatureInitDataDst->PreSmmInitRegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePool (mAcpiCpuData.NumberOfCpus * sizeof (CPU_REGISTER_TABLE));
ASSERT (CpuFeatureInitDataDst->PreSmmInitRegisterTable != 0);
CopyRegisterTable (
(CPU_REGISTER_TABLE *)(UINTN)CpuFeatureInitDataDst->PreSmmInitRegisterTable,
(CPU_REGISTER_TABLE *)(UINTN)CpuFeatureInitDataSrc->PreSmmInitRegisterTable,
mAcpiCpuData.NumberOfCpus
);
}
if (!IsRegisterTableEmpty ((CPU_REGISTER_TABLE *)(UINTN)CpuFeatureInitDataSrc->RegisterTable, mAcpiCpuData.NumberOfCpus)) {
CpuFeatureInitDataDst->RegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePool (mAcpiCpuData.NumberOfCpus * sizeof (CPU_REGISTER_TABLE));
ASSERT (CpuFeatureInitDataDst->RegisterTable != 0);
CopyRegisterTable (
(CPU_REGISTER_TABLE *)(UINTN)CpuFeatureInitDataDst->RegisterTable,
(CPU_REGISTER_TABLE *)(UINTN)CpuFeatureInitDataSrc->RegisterTable,
mAcpiCpuData.NumberOfCpus
);
}
CpuStatus = &CpuFeatureInitDataDst->CpuStatus;
CopyMem (CpuStatus, &CpuFeatureInitDataSrc->CpuStatus, sizeof (CPU_STATUS_INFORMATION));
if (CpuFeatureInitDataSrc->CpuStatus.ThreadCountPerPackage != 0) {
CpuStatus->ThreadCountPerPackage = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateCopyPool (
sizeof (UINT32) * CpuStatus->PackageCount,
(UINT32 *)(UINTN)CpuFeatureInitDataSrc->CpuStatus.ThreadCountPerPackage
);
ASSERT (CpuStatus->ThreadCountPerPackage != 0);
}
if (CpuFeatureInitDataSrc->CpuStatus.ThreadCountPerCore != 0) {
CpuStatus->ThreadCountPerCore = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateCopyPool (
sizeof (UINT8) * (CpuStatus->PackageCount * CpuStatus->MaxCoreCount),
(UINT32 *)(UINTN)CpuFeatureInitDataSrc->CpuStatus.ThreadCountPerCore
);
ASSERT (CpuStatus->ThreadCountPerCore != 0);
}
if (CpuFeatureInitDataSrc->ApLocation != 0) {
CpuFeatureInitDataDst->ApLocation = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateCopyPool (
mAcpiCpuData.NumberOfCpus * sizeof (EFI_CPU_PHYSICAL_LOCATION),
(EFI_CPU_PHYSICAL_LOCATION *)(UINTN)CpuFeatureInitDataSrc->ApLocation
);
ASSERT (CpuFeatureInitDataDst->ApLocation != 0);
}
}
/** /**
Get ACPI CPU data. Get ACPI CPU data.
@ -1064,39 +1132,13 @@ GetAcpiCpuData (
CopyMem ((VOID *)(UINTN)mAcpiCpuData.IdtrProfile, (VOID *)(UINTN)AcpiCpuData->IdtrProfile, sizeof (IA32_DESCRIPTOR)); CopyMem ((VOID *)(UINTN)mAcpiCpuData.IdtrProfile, (VOID *)(UINTN)AcpiCpuData->IdtrProfile, sizeof (IA32_DESCRIPTOR));
if (!IsRegisterTableEmpty ((CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->PreSmmInitRegisterTable, mAcpiCpuData.NumberOfCpus)) {
mAcpiCpuData.PreSmmInitRegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePool (mAcpiCpuData.NumberOfCpus * sizeof (CPU_REGISTER_TABLE));
ASSERT (mAcpiCpuData.PreSmmInitRegisterTable != 0);
CopyRegisterTable (
(CPU_REGISTER_TABLE *)(UINTN)mAcpiCpuData.PreSmmInitRegisterTable,
(CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->PreSmmInitRegisterTable,
mAcpiCpuData.NumberOfCpus
);
} else {
mAcpiCpuData.PreSmmInitRegisterTable = 0;
}
if (!IsRegisterTableEmpty ((CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->RegisterTable, mAcpiCpuData.NumberOfCpus)) {
mAcpiCpuData.RegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePool (mAcpiCpuData.NumberOfCpus * sizeof (CPU_REGISTER_TABLE));
ASSERT (mAcpiCpuData.RegisterTable != 0);
CopyRegisterTable (
(CPU_REGISTER_TABLE *)(UINTN)mAcpiCpuData.RegisterTable,
(CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->RegisterTable,
mAcpiCpuData.NumberOfCpus
);
} else {
mAcpiCpuData.RegisterTable = 0;
}
// //
// Copy AP's GDT, IDT and Machine Check handler into SMRAM. // Copy AP's GDT, IDT and Machine Check handler into SMRAM.
// //
Gdtr = (IA32_DESCRIPTOR *)(UINTN)mAcpiCpuData.GdtrProfile; Gdtr = (IA32_DESCRIPTOR *)(UINTN)mAcpiCpuData.GdtrProfile;
Idtr = (IA32_DESCRIPTOR *)(UINTN)mAcpiCpuData.IdtrProfile; Idtr = (IA32_DESCRIPTOR *)(UINTN)mAcpiCpuData.IdtrProfile;
GdtForAp = AllocatePool ((Gdtr->Limit + 1) + (Idtr->Limit + 1) + mAcpiCpuData.ApMachineCheckHandlerSize); GdtForAp = AllocatePool ((Gdtr->Limit + 1) + (Idtr->Limit + 1) + mAcpiCpuData.ApMachineCheckHandlerSize);
ASSERT (GdtForAp != NULL); ASSERT (GdtForAp != NULL);
IdtForAp = (VOID *) ((UINTN)GdtForAp + (Gdtr->Limit + 1)); IdtForAp = (VOID *) ((UINTN)GdtForAp + (Gdtr->Limit + 1));
MachineCheckHandlerForAp = (VOID *) ((UINTN)IdtForAp + (Idtr->Limit + 1)); MachineCheckHandlerForAp = (VOID *) ((UINTN)IdtForAp + (Idtr->Limit + 1));
@ -1109,41 +1151,23 @@ GetAcpiCpuData (
Idtr->Base = (UINTN)IdtForAp; Idtr->Base = (UINTN)IdtForAp;
mAcpiCpuData.ApMachineCheckHandlerBase = (EFI_PHYSICAL_ADDRESS)(UINTN)MachineCheckHandlerForAp; mAcpiCpuData.ApMachineCheckHandlerBase = (EFI_PHYSICAL_ADDRESS)(UINTN)MachineCheckHandlerForAp;
CpuStatus = &mAcpiCpuData.CpuStatus; ZeroMem (&mAcpiCpuData.CpuFeatureInitData, sizeof (CPU_FEATURE_INIT_DATA));
CopyMem (CpuStatus, &AcpiCpuData->CpuStatus, sizeof (CPU_STATUS_INFORMATION)); CopyCpuFeatureInitDatatoSmram (&mAcpiCpuData.CpuFeatureInitData, &AcpiCpuData->CpuFeatureInitData);
if (AcpiCpuData->CpuStatus.ThreadCountPerPackage != 0) {
CpuStatus->ThreadCountPerPackage = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateCopyPool ( CpuStatus = &mAcpiCpuData.CpuFeatureInitData.CpuStatus;
sizeof (UINT32) * CpuStatus->PackageCount,
(UINT32 *)(UINTN)AcpiCpuData->CpuStatus.ThreadCountPerPackage mCpuFlags.CoreSemaphoreCount = AllocateZeroPool (
); sizeof (UINT32) * CpuStatus->PackageCount *
ASSERT (CpuStatus->ThreadCountPerPackage != 0); CpuStatus->MaxCoreCount * CpuStatus->MaxThreadCount
} );
if (AcpiCpuData->CpuStatus.ThreadCountPerCore != 0) { ASSERT (mCpuFlags.CoreSemaphoreCount != NULL);
CpuStatus->ThreadCountPerCore = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateCopyPool (
sizeof (UINT8) * (CpuStatus->PackageCount * CpuStatus->MaxCoreCount), mCpuFlags.PackageSemaphoreCount = AllocateZeroPool (
(UINT32 *)(UINTN)AcpiCpuData->CpuStatus.ThreadCountPerCore sizeof (UINT32) * CpuStatus->PackageCount *
); CpuStatus->MaxCoreCount * CpuStatus->MaxThreadCount
ASSERT (CpuStatus->ThreadCountPerCore != 0); );
} ASSERT (mCpuFlags.PackageSemaphoreCount != NULL);
if (AcpiCpuData->ApLocation != 0) {
mAcpiCpuData.ApLocation = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateCopyPool (
mAcpiCpuData.NumberOfCpus * sizeof (EFI_CPU_PHYSICAL_LOCATION),
(EFI_CPU_PHYSICAL_LOCATION *)(UINTN)AcpiCpuData->ApLocation
);
ASSERT (mAcpiCpuData.ApLocation != 0);
}
if (CpuStatus->PackageCount != 0) {
mCpuFlags.CoreSemaphoreCount = AllocateZeroPool (
sizeof (UINT32) * CpuStatus->PackageCount *
CpuStatus->MaxCoreCount * CpuStatus->MaxThreadCount
);
ASSERT (mCpuFlags.CoreSemaphoreCount != NULL);
mCpuFlags.PackageSemaphoreCount = AllocateZeroPool (
sizeof (UINT32) * CpuStatus->PackageCount *
CpuStatus->MaxCoreCount * CpuStatus->MaxThreadCount
);
ASSERT (mCpuFlags.PackageSemaphoreCount != NULL);
}
InitializeSpinLock((SPIN_LOCK*) &mCpuFlags.MemoryMappedLock); InitializeSpinLock((SPIN_LOCK*) &mCpuFlags.MemoryMappedLock);
} }