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ArmPkg/CpuDxe: Fixed confusion in AArch64 Table descriptor types 

Table Descriptor and Level-3 Block entry descriptors have the same
translation table type value (ie: 0x3).

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14771 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Olivier Martin 2013-10-14 16:32:38 +00:00 committed by oliviermartin
parent cce992aca2
commit 0127372430
1 changed files with 1 additions and 1 deletions
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2
ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
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@ -265,7 +265,7 @@ GetMemoryRegionRec (
BlockEntry = (UINT64*)TT_GET_ENTRY_FOR_ADDRESS (TranslationTable, TableLevel, *BaseAddress);
EntryType = *BlockEntry & TT_TYPE_MASK;
if (EntryType == TT_TYPE_TABLE_ENTRY) {
if ((TableLevel < 3) && (EntryType == TT_TYPE_TABLE_ENTRY)) {
NextTranslationTable = (UINT64*)(*BlockEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE);
// The entry is a page table, so we go to the next level