mirror of https://github.com/acidanthera/audk.git
PcAtChipsetPkg: Add MMIO Support to RTC driver
Some virtual machine managers like Kvmtool emulate the MC146818 RTC controller in the MMIO space so that architectures that do not support I/O Mapped I/O can use the RTC. This patch adds MMIO support to the RTC controller driver. The PCD PcdRtcUseMmio has been added to select I/O or MMIO support. If PcdRtcUseMmio is: TRUE - Indicates the RTC port registers are in MMIO space. FALSE - Indicates the RTC port registers are in I/O space. Default is I/O space. Additionally two new PCDs PcdRtcIndexRegister64 and PcdRtcTargetRegister64 have been introduced to provide the base address for the RTC registers in the MMIO space. When MMIO support is selected (PcdRtcUseMmio == TRUE) the driver converts the pointers to the RTC MMIO registers so that the RTC registers are accessible post ExitBootServices. Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
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@ -6,6 +6,7 @@
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#
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# Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2017, AMD Inc. All rights reserved.<BR>
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# Copyright (c) 2018 - 2020, ARM Limited. All rights reserved.<BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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@ -41,6 +42,13 @@
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# @Prompt Configure HPET to use MSI.
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gPcAtChipsetPkgTokenSpaceGuid.PcdHpetMsiEnable|TRUE|BOOLEAN|0x00001000
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## Indicates the RTC port registers are in MMIO space, or in I/O space.
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# Default is I/O space.<BR><BR>
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# TRUE - RTC port registers are in MMIO space.<BR>
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# FALSE - RTC port registers are in I/O space.<BR>
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# @Prompt RTC port registers use MMIO.
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gPcAtChipsetPkgTokenSpaceGuid.PcdRtcUseMmio|FALSE|BOOLEAN|0x00000021
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[PcdsFixedAtBuild, PcdsDynamic, PcdsDynamicEx, PcdsPatchableInModule]
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## This PCD specifies the base address of the HPET timer.
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# @Prompt HPET base address.
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@ -68,6 +76,14 @@
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# @Expression 0x80000001 | gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear < gPcAtChipsetPkgTokenSpaceGuid.PcdMinimalValidYear + 100
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gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear|2097|UINT16|0x0000000E
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## Specifies RTC Index Register address in MMIO space.
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# @Prompt RTC Index Register address
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gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister64|0x0|UINT64|0x00000022
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## Specifies RTC Target Register address in MMIO space.
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# @Prompt RTC Target Register address
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gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister64|0x0|UINT64|0x00000023
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[PcdsFixedAtBuild, PcdsPatchableInModule]
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## Defines the ACPI register set base address.
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# The invalid 0xFFFF is as its default value. It must be configured to the real value.
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@ -3,6 +3,7 @@
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Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2017, AMD Inc. All rights reserved.<BR>
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Copyright (c) 2018 - 2020, ARM Limited. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@ -10,6 +11,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
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#include "PcRtc.h"
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extern UINTN mRtcIndexRegister;
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extern UINTN mRtcTargetRegister;
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//
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// Days of month.
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//
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@ -54,38 +58,132 @@ IsWithinOneDay (
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);
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/**
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Read RTC content through its registers.
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Read RTC content through its registers using IO access.
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@param Address Address offset of RTC. It is recommended to use macros such as
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RTC_ADDRESS_SECONDS.
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@param Address Address offset of RTC. It is recommended to use
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macros such as RTC_ADDRESS_SECONDS.
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@return The data of UINT8 type read from RTC.
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**/
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STATIC
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UINT8
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RtcRead (
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IN UINT8 Address
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IoRtcRead (
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IN UINTN Address
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)
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{
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IoWrite8 (PcdGet8 (PcdRtcIndexRegister), (UINT8) (Address | (UINT8) (IoRead8 (PcdGet8 (PcdRtcIndexRegister)) & 0x80)));
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IoWrite8 (
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PcdGet8 (PcdRtcIndexRegister),
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(UINT8)(Address | (UINT8)(IoRead8 (PcdGet8 (PcdRtcIndexRegister)) & 0x80))
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);
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return IoRead8 (PcdGet8 (PcdRtcTargetRegister));
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}
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/**
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Write RTC through its registers using IO access.
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@param Address Address offset of RTC. It is recommended to use
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macros such as RTC_ADDRESS_SECONDS.
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@param Data The content you want to write into RTC.
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**/
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STATIC
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VOID
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IoRtcWrite (
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IN UINTN Address,
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IN UINT8 Data
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)
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{
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IoWrite8 (
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PcdGet8 (PcdRtcIndexRegister),
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(UINT8)(Address | (UINT8)(IoRead8 (PcdGet8 (PcdRtcIndexRegister)) & 0x80))
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);
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IoWrite8 (PcdGet8 (PcdRtcTargetRegister), Data);
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}
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/**
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Read RTC content through its registers using MMIO access.
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@param Address Address offset of RTC. It is recommended to use
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macros such as RTC_ADDRESS_SECONDS.
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@return The data of UINT8 type read from RTC.
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**/
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STATIC
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UINT8
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MmioRtcRead (
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IN UINTN Address
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)
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{
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MmioWrite8 (
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mRtcIndexRegister,
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(UINT8)(Address | (UINT8)(MmioRead8 (mRtcIndexRegister) & 0x80))
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);
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return MmioRead8 (mRtcTargetRegister);
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}
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/**
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Write RTC through its registers using MMIO access.
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@param Address Address offset of RTC. It is recommended to use
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macros such as RTC_ADDRESS_SECONDS.
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@param Data The content you want to write into RTC.
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**/
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STATIC
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VOID
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MmioRtcWrite (
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IN UINTN Address,
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IN UINT8 Data
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)
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{
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MmioWrite8 (
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mRtcIndexRegister,
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(UINT8)(Address | (UINT8)(MmioRead8 (mRtcIndexRegister) & 0x80))
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);
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MmioWrite8 (mRtcTargetRegister, Data);
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}
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/**
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Read RTC content through its registers.
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@param Address Address offset of RTC. It is recommended to use
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macros such as RTC_ADDRESS_SECONDS.
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@return The data of UINT8 type read from RTC.
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**/
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STATIC
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UINT8
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RtcRead (
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IN UINTN Address
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)
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{
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if (FeaturePcdGet (PcdRtcUseMmio)) {
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return MmioRtcRead (Address);
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}
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return IoRtcRead (Address);
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}
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/**
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Write RTC through its registers.
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@param Address Address offset of RTC. It is recommended to use macros such as
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RTC_ADDRESS_SECONDS.
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@param Data The content you want to write into RTC.
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@param Address Address offset of RTC. It is recommended to use
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macros such as RTC_ADDRESS_SECONDS.
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@param Data The content you want to write into RTC.
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**/
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STATIC
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VOID
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RtcWrite (
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IN UINT8 Address,
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IN UINTN Address,
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IN UINT8 Data
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)
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{
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IoWrite8 (PcdGet8 (PcdRtcIndexRegister), (UINT8) (Address | (UINT8) (IoRead8 (PcdGet8 (PcdRtcIndexRegister)) & 0x80)));
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IoWrite8 (PcdGet8 (PcdRtcTargetRegister), Data);
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if (FeaturePcdGet (PcdRtcUseMmio)) {
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MmioRtcWrite (Address, Data);
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} else {
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IoRtcWrite (Address, Data);
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}
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}
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/**
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Provides Set/Get time operations.
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Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2018 - 2020, ARM Limited. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Library/DxeServicesTableLib.h>
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#include "PcRtc.h"
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PC_RTC_MODULE_GLOBALS mModuleGlobal;
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EFI_HANDLE mHandle = NULL;
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STATIC EFI_EVENT mVirtualAddrChangeEvent;
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UINTN mRtcIndexRegister;
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UINTN mRtcTargetRegister;
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/**
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Returns the current time and date information, and the time-keeping capabilities
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of the hardware platform.
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return PcRtcSetWakeupTime (Enabled, Time, &mModuleGlobal);
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}
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/**
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Fixup internal data so that EFI can be called in virtual mode.
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Call the passed in Child Notify event and convert any pointers in
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lib to virtual mode.
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@param[in] Event The Event that is being processed
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@param[in] Context Event Context
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**/
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VOID
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EFIAPI
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LibRtcVirtualNotifyEvent (
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IN EFI_EVENT Event,
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IN VOID *Context
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)
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{
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// Only needed if you are going to support the OS calling RTC functions in
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// virtual mode. You will need to call EfiConvertPointer (). To convert any
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// stored physical addresses to virtual address. After the OS transitions to
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// calling in virtual mode, all future runtime calls will be made in virtual
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// mode.
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EfiConvertPointer (0x0, (VOID**)&mRtcIndexRegister);
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EfiConvertPointer (0x0, (VOID**)&mRtcTargetRegister);
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}
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/**
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The user Entry Point for PcRTC module.
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EfiInitializeLock (&mModuleGlobal.RtcLock, TPL_CALLBACK);
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mModuleGlobal.CenturyRtcAddress = GetCenturyRtcAddress ();
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if (FeaturePcdGet (PcdRtcUseMmio)) {
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mRtcIndexRegister = (UINTN)PcdGet64 (PcdRtcIndexRegister64);
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mRtcTargetRegister = (UINTN)PcdGet64 (PcdRtcTargetRegister64);
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}
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Status = PcRtcInit (&mModuleGlobal);
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ASSERT_EFI_ERROR (Status);
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NULL,
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NULL
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);
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ASSERT_EFI_ERROR (Status);
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if (EFI_ERROR (Status)) {
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ASSERT_EFI_ERROR (Status);
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return Status;
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}
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if (FeaturePcdGet (PcdRtcUseMmio)) {
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// Register for the virtual address change event
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Status = gBS->CreateEventEx (
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EVT_NOTIFY_SIGNAL,
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TPL_NOTIFY,
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LibRtcVirtualNotifyEvent,
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NULL,
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&gEfiEventVirtualAddressChangeGuid,
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&mVirtualAddrChangeEvent
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);
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ASSERT_EFI_ERROR (Status);
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}
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return Status;
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}
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@ -6,6 +6,7 @@
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#
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# Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2017, AMD Inc. All rights reserved.<BR>
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# Copyright (c) 2018 - 2020, ARM Limited. All rights reserved.<BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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## SOMETIMES_CONSUMES ## SystemTable
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gEfiAcpiTableGuid
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gEfiEventVirtualAddressChangeGuid
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[FeaturePcd]
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gPcAtChipsetPkgTokenSpaceGuid.PcdRtcUseMmio ## CONSUMES
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[FixedPcd]
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gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterA ## CONSUMES
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gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterB ## CONSUMES
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gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear ## CONSUMES
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gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister ## CONSUMES
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gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister ## CONSUMES
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gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister64 ## CONSUMES
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gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister64 ## CONSUMES
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[Depex]
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gEfiVariableArchProtocolGuid AND gEfiVariableWriteArchProtocolGuid
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