mirror of https://github.com/acidanthera/audk.git
1) Use FeatureFlag PcdPciBusHotplugDeviceSupport to merge LightPciLib.c with PcdLib.c.
2) Correct some minor bugs: when invoking gRT->GetVariable the Attributes field can be optianal. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@2091 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
qwang12
parent
6874dbd0e2
commit
0265b1e8cb
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@ -1,881 +0,0 @@
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/*++
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Copyright (c) 2006, Intel Corporation
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Module Name:
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LightPciLib.c
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Abstract:
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Light PCI Bus Driver Lib file
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It abstracts some functions that can be different
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between light PCI bus driver and full PCI bus driver
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Revision History
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--*/
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#include "pcibus.h"
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//
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// Light PCI bus driver woundn't support hotplug device
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// So just return
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//
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VOID
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InstallHotPlugRequestProtocol (
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IN EFI_STATUS *Status
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)
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/*++
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Routine Description:
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Arguments:
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Returns:
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None
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--*/
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// TODO: Status - add argument and description to function comment
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{
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return ;
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}
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//
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// Light PCI bus driver woundn't support hotplug device
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// So just skip install this GUID
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//
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VOID
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InstallPciHotplugGuid (
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IN PCI_IO_DEVICE *PciIoDevice
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)
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/*++
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Routine Description:
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Arguments:
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Returns:
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None
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--*/
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// TODO: PciIoDevice - add argument and description to function comment
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{
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return ;
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}
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//
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// Light PCI bus driver woundn't support hotplug device
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// So just skip uninstall the GUID
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//
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VOID
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UninstallPciHotplugGuid (
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IN PCI_IO_DEVICE *PciIoDevice
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)
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/*++
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Routine Description:
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Arguments:
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Returns:
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None
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--*/
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// TODO: PciIoDevice - add argument and description to function comment
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{
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return ;
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}
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//
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// Light PCI bus driver woundn't support PCCard
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// So it needn't get the bar of CardBus
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//
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VOID
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GetBackPcCardBar (
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IN PCI_IO_DEVICE *PciIoDevice
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)
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/*++
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Routine Description:
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TODO: Add function description
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Arguments:
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PciIoDevice - TODO: add argument description
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Returns:
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TODO: add return values
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--*/
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{
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return ;
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}
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//
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// Light PCI bus driver woundn't support resource reallocation
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// So just return
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//
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EFI_STATUS
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RemoveRejectedPciDevices (
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EFI_HANDLE RootBridgeHandle,
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IN PCI_IO_DEVICE *Bridge
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)
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/*++
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Routine Description:
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TODO: Add function description
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Arguments:
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RootBridgeHandle - TODO: add argument description
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Bridge - TODO: add argument description
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Returns:
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EFI_SUCCESS - TODO: Add description for return value
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--*/
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{
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return EFI_SUCCESS;
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}
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//
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// Light PCI bus driver woundn't support resource reallocation
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// Simplified the code
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//
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EFI_STATUS
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PciHostBridgeResourceAllocator (
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IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
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)
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/*++
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Routine Description:
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Arguments:
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Returns:
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None
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--*/
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// TODO: PciResAlloc - add argument and description to function comment
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// TODO: EFI_NOT_FOUND - add return value to function comment
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// TODO: EFI_OUT_OF_RESOURCES - add return value to function comment
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// TODO: EFI_NOT_FOUND - add return value to function comment
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// TODO: EFI_SUCCESS - add return value to function comment
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{
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PCI_IO_DEVICE *RootBridgeDev;
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EFI_HANDLE RootBridgeHandle;
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VOID *AcpiConfig;
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EFI_STATUS Status;
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UINT64 IoBase;
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UINT64 Mem32Base;
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UINT64 PMem32Base;
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UINT64 Mem64Base;
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UINT64 PMem64Base;
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UINT64 MaxOptionRomSize;
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PCI_RESOURCE_NODE *IoBridge;
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PCI_RESOURCE_NODE *Mem32Bridge;
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PCI_RESOURCE_NODE *PMem32Bridge;
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PCI_RESOURCE_NODE *Mem64Bridge;
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PCI_RESOURCE_NODE *PMem64Bridge;
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PCI_RESOURCE_NODE IoPool;
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PCI_RESOURCE_NODE Mem32Pool;
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PCI_RESOURCE_NODE PMem32Pool;
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PCI_RESOURCE_NODE Mem64Pool;
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PCI_RESOURCE_NODE PMem64Pool;
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REPORT_STATUS_CODE_LIBRARY_DEVICE_HANDLE_EXTENDED_DATA ExtendedData;
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//
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// Initialize resource pool
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//
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InitializeResourcePool (&IoPool, PciBarTypeIo16);
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InitializeResourcePool (&Mem32Pool, PciBarTypeMem32);
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InitializeResourcePool (&PMem32Pool, PciBarTypePMem32);
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InitializeResourcePool (&Mem64Pool, PciBarTypeMem64);
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InitializeResourcePool (&PMem64Pool, PciBarTypePMem64);
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RootBridgeDev = NULL;
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RootBridgeHandle = 0;
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while (PciResAlloc->GetNextRootBridge (PciResAlloc, &RootBridgeHandle) == EFI_SUCCESS) {
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//
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// Get RootBridg Device by handle
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//
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RootBridgeDev = GetRootBridgeByHandle (RootBridgeHandle);
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if (RootBridgeDev == NULL) {
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return EFI_NOT_FOUND;
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}
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//
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// Get host bridge handle for status report
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//
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ExtendedData.Handle = RootBridgeDev->PciRootBridgeIo->ParentHandle;
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//
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// Create the entire system resource map from the information collected by
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// enumerator. Several resource tree was created
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//
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IoBridge = CreateResourceNode (
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RootBridgeDev,
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0,
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0xFFF,
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0,
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PciBarTypeIo16,
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PciResUsageTypical
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);
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Mem32Bridge = CreateResourceNode (
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RootBridgeDev,
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0,
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0xFFFFF,
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0,
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PciBarTypeMem32,
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PciResUsageTypical
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);
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PMem32Bridge = CreateResourceNode (
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RootBridgeDev,
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0,
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0xFFFFF,
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0,
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PciBarTypePMem32,
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PciResUsageTypical
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);
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Mem64Bridge = CreateResourceNode (
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RootBridgeDev,
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0,
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0xFFFFF,
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0,
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PciBarTypeMem64,
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PciResUsageTypical
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);
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PMem64Bridge = CreateResourceNode (
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RootBridgeDev,
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0,
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0xFFFFF,
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0,
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PciBarTypePMem64,
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PciResUsageTypical
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);
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//
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// Create resourcemap by going through all the devices subject to this root bridge
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//
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Status = CreateResourceMap (
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RootBridgeDev,
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IoBridge,
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Mem32Bridge,
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PMem32Bridge,
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Mem64Bridge,
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PMem64Bridge
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);
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//
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// Get the max ROM size that the root bridge can process
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//
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RootBridgeDev->RomSize = Mem32Bridge->Length;
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//
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// Get Max Option Rom size for current root bridge
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//
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MaxOptionRomSize = GetMaxOptionRomSize (RootBridgeDev);
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//
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// Enlarger the mem32 resource to accomdate the option rom
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// if the mem32 resource is not enough to hold the rom
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//
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if (MaxOptionRomSize > Mem32Bridge->Length) {
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Mem32Bridge->Length = MaxOptionRomSize;
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RootBridgeDev->RomSize = MaxOptionRomSize;
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//
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// Alignment should be adjusted as well
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//
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if (Mem32Bridge->Alignment < MaxOptionRomSize - 1) {
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Mem32Bridge->Alignment = MaxOptionRomSize - 1;
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}
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}
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|
||||
//
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// Based on the all the resource tree, contruct ACPI resource node to
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// submit the resource aperture to pci host bridge protocol
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//
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Status = ConstructAcpiResourceRequestor (
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RootBridgeDev,
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IoBridge,
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Mem32Bridge,
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PMem32Bridge,
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Mem64Bridge,
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PMem64Bridge,
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&AcpiConfig
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);
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//
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// Insert these resource nodes into the database
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//
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InsertResourceNode (&IoPool, IoBridge);
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InsertResourceNode (&Mem32Pool, Mem32Bridge);
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InsertResourceNode (&PMem32Pool, PMem32Bridge);
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InsertResourceNode (&Mem64Pool, Mem64Bridge);
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InsertResourceNode (&PMem64Pool, PMem64Bridge);
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|
||||
if (Status == EFI_SUCCESS) {
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//
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||||
// Submit the resource requirement
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||||
//
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||||
Status = PciResAlloc->SubmitResources (
|
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PciResAlloc,
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RootBridgeDev->Handle,
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||||
AcpiConfig
|
||||
);
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||||
}
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//
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// Free acpi resource node
|
||||
//
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||||
if (AcpiConfig) {
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gBS->FreePool (AcpiConfig);
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}
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|
||||
if (EFI_ERROR (Status)) {
|
||||
//
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||||
// Destroy all the resource tree
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||||
//
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||||
DestroyResourceTree (&IoPool);
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DestroyResourceTree (&Mem32Pool);
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DestroyResourceTree (&PMem32Pool);
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DestroyResourceTree (&Mem64Pool);
|
||||
DestroyResourceTree (&PMem64Pool);
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||||
return Status;
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||||
}
|
||||
}
|
||||
//
|
||||
// End while
|
||||
//
|
||||
|
||||
//
|
||||
// Notify pci bus driver starts to program the resource
|
||||
//
|
||||
Status = NotifyPhase (PciResAlloc, EfiPciHostBridgeAllocateResources);
|
||||
|
||||
if (EFI_ERROR (Status)) {
|
||||
//
|
||||
// Allocation failed, then return
|
||||
//
|
||||
return EFI_OUT_OF_RESOURCES;
|
||||
}
|
||||
//
|
||||
// Raise the EFI_IOB_PCI_RES_ALLOC status code
|
||||
//
|
||||
REPORT_STATUS_CODE_WITH_EXTENDED_DATA (
|
||||
EFI_PROGRESS_CODE,
|
||||
EFI_IO_BUS_PCI | EFI_IOB_PCI_PC_RES_ALLOC,
|
||||
(VOID *) &ExtendedData,
|
||||
sizeof (ExtendedData)
|
||||
);
|
||||
|
||||
//
|
||||
// Notify pci bus driver starts to program the resource
|
||||
//
|
||||
NotifyPhase (PciResAlloc, EfiPciHostBridgeSetResources);
|
||||
|
||||
RootBridgeDev = NULL;
|
||||
|
||||
RootBridgeHandle = 0;
|
||||
|
||||
while (PciResAlloc->GetNextRootBridge (PciResAlloc, &RootBridgeHandle) == EFI_SUCCESS) {
|
||||
//
|
||||
// Get RootBridg Device by handle
|
||||
//
|
||||
RootBridgeDev = GetRootBridgeByHandle (RootBridgeHandle);
|
||||
|
||||
if (RootBridgeDev == NULL) {
|
||||
return EFI_NOT_FOUND;
|
||||
}
|
||||
|
||||
//
|
||||
// Get acpi resource node for all the resource types
|
||||
//
|
||||
AcpiConfig = NULL;
|
||||
Status = PciResAlloc->GetProposedResources (
|
||||
PciResAlloc,
|
||||
RootBridgeDev->Handle,
|
||||
&AcpiConfig
|
||||
);
|
||||
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
//
|
||||
// Get the resource base by interpreting acpi resource node
|
||||
//
|
||||
//
|
||||
GetResourceBase (
|
||||
AcpiConfig,
|
||||
&IoBase,
|
||||
&Mem32Base,
|
||||
&PMem32Base,
|
||||
&Mem64Base,
|
||||
&PMem64Base
|
||||
);
|
||||
|
||||
//
|
||||
// Process option rom for this root bridge
|
||||
//
|
||||
Status = ProcessOptionRom (RootBridgeDev, Mem32Base, RootBridgeDev->RomSize);
|
||||
|
||||
//
|
||||
// Create the entire system resource map from the information collected by
|
||||
// enumerator. Several resource tree was created
|
||||
//
|
||||
Status = GetResourceMap (
|
||||
RootBridgeDev,
|
||||
&IoBridge,
|
||||
&Mem32Bridge,
|
||||
&PMem32Bridge,
|
||||
&Mem64Bridge,
|
||||
&PMem64Bridge,
|
||||
&IoPool,
|
||||
&Mem32Pool,
|
||||
&PMem32Pool,
|
||||
&Mem64Pool,
|
||||
&PMem64Pool
|
||||
);
|
||||
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
//
|
||||
// Program IO resources
|
||||
//
|
||||
ProgramResource (
|
||||
IoBase,
|
||||
IoBridge
|
||||
);
|
||||
|
||||
//
|
||||
// Program Mem32 resources
|
||||
//
|
||||
ProgramResource (
|
||||
Mem32Base,
|
||||
Mem32Bridge
|
||||
);
|
||||
|
||||
//
|
||||
// Program PMem32 resources
|
||||
//
|
||||
ProgramResource (
|
||||
PMem32Base,
|
||||
PMem32Bridge
|
||||
);
|
||||
|
||||
//
|
||||
// Program Mem64 resources
|
||||
//
|
||||
ProgramResource (
|
||||
Mem64Base,
|
||||
Mem64Bridge
|
||||
);
|
||||
|
||||
//
|
||||
// Program PMem64 resources
|
||||
//
|
||||
ProgramResource (
|
||||
PMem64Base,
|
||||
PMem64Bridge
|
||||
);
|
||||
|
||||
if (AcpiConfig != NULL) {
|
||||
gBS->FreePool (AcpiConfig);
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// Destroy all the resource tree
|
||||
//
|
||||
DestroyResourceTree (&IoPool);
|
||||
DestroyResourceTree (&Mem32Pool);
|
||||
DestroyResourceTree (&PMem32Pool);
|
||||
DestroyResourceTree (&Mem64Pool);
|
||||
DestroyResourceTree (&PMem64Pool);
|
||||
|
||||
//
|
||||
// Notify the resource allocation phase is to end
|
||||
//
|
||||
NotifyPhase (PciResAlloc, EfiPciHostBridgeEndResourceAllocation);
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
EFI_STATUS
|
||||
PciScanBus (
|
||||
IN PCI_IO_DEVICE *Bridge,
|
||||
IN UINT8 StartBusNumber,
|
||||
OUT UINT8 *SubBusNumber,
|
||||
OUT UINT8 *PaddedBusRange
|
||||
)
|
||||
/*++
|
||||
|
||||
Routine Description:
|
||||
|
||||
This routine is used to assign bus number to the given PCI bus system
|
||||
|
||||
Arguments:
|
||||
|
||||
Returns:
|
||||
|
||||
None
|
||||
|
||||
--*/
|
||||
// TODO: Bridge - add argument and description to function comment
|
||||
// TODO: StartBusNumber - add argument and description to function comment
|
||||
// TODO: SubBusNumber - add argument and description to function comment
|
||||
// TODO: PaddedBusRange - add argument and description to function comment
|
||||
// TODO: EFI_DEVICE_ERROR - add return value to function comment
|
||||
// TODO: EFI_SUCCESS - add return value to function comment
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
PCI_TYPE00 Pci;
|
||||
UINT8 Device;
|
||||
UINT8 Func;
|
||||
UINT64 Address;
|
||||
UINTN SecondBus;
|
||||
UINT16 Register;
|
||||
PCI_IO_DEVICE *PciDevice;
|
||||
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
|
||||
|
||||
PciRootBridgeIo = Bridge->PciRootBridgeIo;
|
||||
SecondBus = 0;
|
||||
Register = 0;
|
||||
|
||||
ResetAllPpbBusReg (Bridge, StartBusNumber);
|
||||
|
||||
for (Device = 0; Device <= PCI_MAX_DEVICE; Device++) {
|
||||
for (Func = 0; Func <= PCI_MAX_FUNC; Func++) {
|
||||
|
||||
//
|
||||
// Check to see whether a pci device is present
|
||||
//
|
||||
Status = PciDevicePresent (
|
||||
PciRootBridgeIo,
|
||||
&Pci,
|
||||
StartBusNumber,
|
||||
Device,
|
||||
Func
|
||||
);
|
||||
|
||||
if (!EFI_ERROR (Status) &&
|
||||
(IS_PCI_BRIDGE (&Pci) ||
|
||||
IS_CARDBUS_BRIDGE (&Pci))) {
|
||||
|
||||
//
|
||||
// Get the bridge information
|
||||
//
|
||||
Status = PciSearchDevice (
|
||||
Bridge,
|
||||
&Pci,
|
||||
StartBusNumber,
|
||||
Device,
|
||||
Func,
|
||||
&PciDevice
|
||||
);
|
||||
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
(*SubBusNumber)++;
|
||||
|
||||
SecondBus = (*SubBusNumber);
|
||||
|
||||
Register = (UINT16) ((SecondBus << 8) | (UINT16) StartBusNumber);
|
||||
|
||||
Address = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, 0x18);
|
||||
|
||||
Status = PciRootBridgeIo->Pci.Write (
|
||||
PciRootBridgeIo,
|
||||
EfiPciWidthUint16,
|
||||
Address,
|
||||
1,
|
||||
&Register
|
||||
);
|
||||
|
||||
//
|
||||
// Initialize SubBusNumber to SecondBus
|
||||
//
|
||||
Address = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, 0x1A);
|
||||
Status = PciRootBridgeIo->Pci.Write (
|
||||
PciRootBridgeIo,
|
||||
EfiPciWidthUint8,
|
||||
Address,
|
||||
1,
|
||||
SubBusNumber
|
||||
);
|
||||
//
|
||||
// If it is PPB, resursively search down this bridge
|
||||
//
|
||||
if (IS_PCI_BRIDGE (&Pci)) {
|
||||
//
|
||||
// Temporarily initialize SubBusNumber to maximum bus number to ensure the
|
||||
// PCI configuration transaction to go through any PPB
|
||||
//
|
||||
Address = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, 0x1A);
|
||||
Register = 0xFF;
|
||||
Status = PciRootBridgeIo->Pci.Write (
|
||||
PciRootBridgeIo,
|
||||
EfiPciWidthUint8,
|
||||
Address,
|
||||
1,
|
||||
&Register
|
||||
);
|
||||
|
||||
PreprocessController (
|
||||
PciDevice,
|
||||
PciDevice->BusNumber,
|
||||
PciDevice->DeviceNumber,
|
||||
PciDevice->FunctionNumber,
|
||||
EfiPciBeforeChildBusEnumeration
|
||||
);
|
||||
|
||||
Status = PciScanBus (
|
||||
PciDevice,
|
||||
(UINT8) (SecondBus),
|
||||
SubBusNumber,
|
||||
PaddedBusRange
|
||||
);
|
||||
|
||||
if (EFI_ERROR (Status)) {
|
||||
return EFI_DEVICE_ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// Set the current maximum bus number under the PPB
|
||||
//
|
||||
|
||||
Address = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, 0x1A);
|
||||
|
||||
Status = PciRootBridgeIo->Pci.Write (
|
||||
PciRootBridgeIo,
|
||||
EfiPciWidthUint8,
|
||||
Address,
|
||||
1,
|
||||
SubBusNumber
|
||||
);
|
||||
|
||||
}
|
||||
|
||||
if (Func == 0 && !IS_PCI_MULTI_FUNC (&Pci)) {
|
||||
|
||||
//
|
||||
// Skip sub functions, this is not a multi function device
|
||||
//
|
||||
|
||||
Func = PCI_MAX_FUNC;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
//
|
||||
// Light PCI bus driver woundn't support P2C
|
||||
// Return instead
|
||||
//
|
||||
EFI_STATUS
|
||||
PciHostBridgeP2CProcess (
|
||||
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
|
||||
)
|
||||
/*++
|
||||
|
||||
Routine Description:
|
||||
|
||||
Arguments:
|
||||
|
||||
Returns:
|
||||
|
||||
None
|
||||
|
||||
--*/
|
||||
// TODO: PciResAlloc - add argument and description to function comment
|
||||
// TODO: EFI_SUCCESS - add return value to function comment
|
||||
{
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
//
|
||||
// Light PCI bus driver woundn't support hotplug device
|
||||
// Simplified the code
|
||||
//
|
||||
EFI_STATUS
|
||||
PciHostBridgeEnumerator (
|
||||
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
|
||||
)
|
||||
/*++
|
||||
|
||||
Routine Description:
|
||||
|
||||
This function is used to enumerate the entire host bridge
|
||||
in a given platform
|
||||
|
||||
Arguments:
|
||||
|
||||
PciResAlloc A pointer to the protocol to allocate resource.
|
||||
|
||||
Returns:
|
||||
|
||||
None
|
||||
|
||||
--*/
|
||||
// TODO: EFI_OUT_OF_RESOURCES - add return value to function comment
|
||||
// TODO: EFI_OUT_OF_RESOURCES - add return value to function comment
|
||||
// TODO: EFI_SUCCESS - add return value to function comment
|
||||
{
|
||||
EFI_HANDLE RootBridgeHandle;
|
||||
PCI_IO_DEVICE *RootBridgeDev;
|
||||
EFI_STATUS Status;
|
||||
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
|
||||
UINT16 MinBus;
|
||||
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptors;
|
||||
|
||||
InitializeHotPlugSupport ();
|
||||
|
||||
//
|
||||
// Notify the bus allocation phase is about to start
|
||||
//
|
||||
NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginBusAllocation);
|
||||
|
||||
RootBridgeHandle = NULL;
|
||||
while (PciResAlloc->GetNextRootBridge (PciResAlloc, &RootBridgeHandle) == EFI_SUCCESS) {
|
||||
|
||||
//
|
||||
// if a root bridge instance is found, create root bridge device for it
|
||||
//
|
||||
|
||||
RootBridgeDev = CreateRootBridge (RootBridgeHandle);
|
||||
|
||||
if (RootBridgeDev == NULL) {
|
||||
return EFI_OUT_OF_RESOURCES;
|
||||
}
|
||||
|
||||
//
|
||||
// Enumerate all the buses under this root bridge
|
||||
//
|
||||
|
||||
Status = PciRootBridgeEnumerator (
|
||||
PciResAlloc,
|
||||
RootBridgeDev
|
||||
);
|
||||
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
DestroyRootBridge (RootBridgeDev);
|
||||
|
||||
//
|
||||
// Error proccess here
|
||||
//
|
||||
}
|
||||
|
||||
//
|
||||
// Notify the bus allocation phase is to end
|
||||
//
|
||||
NotifyPhase (PciResAlloc, EfiPciHostBridgeEndBusAllocation);
|
||||
|
||||
//
|
||||
// Notify the resource allocation phase is to start
|
||||
//
|
||||
NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginResourceAllocation);
|
||||
|
||||
RootBridgeHandle = NULL;
|
||||
while (PciResAlloc->GetNextRootBridge (PciResAlloc, &RootBridgeHandle) == EFI_SUCCESS) {
|
||||
|
||||
//
|
||||
// if a root bridge instance is found, create root bridge device for it
|
||||
//
|
||||
|
||||
RootBridgeDev = CreateRootBridge (RootBridgeHandle);
|
||||
|
||||
if (RootBridgeDev == NULL) {
|
||||
return EFI_OUT_OF_RESOURCES;
|
||||
}
|
||||
|
||||
Status = StartManagingRootBridge (RootBridgeDev);
|
||||
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
PciRootBridgeIo = RootBridgeDev->PciRootBridgeIo;
|
||||
Status = PciRootBridgeIo->Configuration (PciRootBridgeIo, (VOID **) &Descriptors);
|
||||
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
Status = PciGetBusRange (&Descriptors, &MinBus, NULL, NULL);
|
||||
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
//
|
||||
// Determine root bridge attribute by calling interface of Pcihostbridge
|
||||
// protocol
|
||||
//
|
||||
DetermineRootBridgeAttributes (
|
||||
PciResAlloc,
|
||||
RootBridgeDev
|
||||
);
|
||||
|
||||
//
|
||||
// Collect all the resource information under this root bridge
|
||||
// A database that records all the information about pci device subject to this
|
||||
// root bridge will then be created
|
||||
//
|
||||
Status = PciPciDeviceInfoCollector (
|
||||
RootBridgeDev,
|
||||
(UINT8) MinBus
|
||||
);
|
||||
|
||||
if (EFI_ERROR (Status)) {
|
||||
return Status;
|
||||
}
|
||||
|
||||
InsertRootBridge (RootBridgeDev);
|
||||
|
||||
//
|
||||
// Record the hostbridge handle
|
||||
//
|
||||
AddHostBridgeEnumerator (RootBridgeDev->PciRootBridgeIo->ParentHandle);
|
||||
}
|
||||
|
||||
return EFI_SUCCESS;
|
||||
}
|
||||
Loading…
Reference in New Issue