tyler.durden
/
audk
mirror of https://github.com/acidanthera/audk.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

OvmfPkg/IndustryStandard/Q35MchIch9.h: add extended TSEG size macros 

Add the macros for interfacing with the QEMU feature added in QEMU commit
2f295167e0c4 ("q35/mch: implement extended TSEG sizes", 2017-06-08).

Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
This commit is contained in:
Laszlo Ersek 2017-07-04 14:18:08 +02:00
parent 966dbaf400
commit 031e4ce262
1 changed files with 4 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
OvmfPkg/Include/IndustryStandard/Q35MchIch9.h
View File

@ -33,6 +33,9 @@
// //
#define DRAMC_REGISTER_Q35(Offset) PCI_LIB_ADDRESS (0, 0, 0, (Offset)) #define DRAMC_REGISTER_Q35(Offset) PCI_LIB_ADDRESS (0, 0, 0, (Offset))
#define MCH_EXT_TSEG_MB 0x50
#define MCH_EXT_TSEG_MB_QUERY 0xFFFF
#define MCH_GGC 0x52 #define MCH_GGC 0x52
#define MCH_GGC_IVD BIT1 #define MCH_GGC_IVD BIT1
@ -54,6 +57,7 @@
#define MCH_ESMRAMC_SM_CACHE BIT5 #define MCH_ESMRAMC_SM_CACHE BIT5
#define MCH_ESMRAMC_SM_L1 BIT4 #define MCH_ESMRAMC_SM_L1 BIT4
#define MCH_ESMRAMC_SM_L2 BIT3 #define MCH_ESMRAMC_SM_L2 BIT3
#define MCH_ESMRAMC_TSEG_EXT (BIT2 | BIT1)
#define MCH_ESMRAMC_TSEG_8MB BIT2 #define MCH_ESMRAMC_TSEG_8MB BIT2
#define MCH_ESMRAMC_TSEG_2MB BIT1 #define MCH_ESMRAMC_TSEG_2MB BIT1
#define MCH_ESMRAMC_TSEG_1MB 0 #define MCH_ESMRAMC_TSEG_1MB 0