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ArmVirtPkg/ArmVirtGicArchLib: adapt ASSERT()s to 64-bit base addresses 

Since All the GIC base address variables has been aligned to 64-bit, it
doesn't make sense to continue use MAX_UINT32 in ASSERT() statement, so
this patch uses MAX_UINTN to adapt to this kind of change.

Contributed-under: TianoCore Contribution Agreement 1.0
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Dennis Chen <dennis.chen@arm.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
This commit is contained in:
Dennis Chen 2016-10-21 13:50:24 +08:00 committed by Ard Biesheuvel
parent 57419e6790
commit 041e842ab7
1 changed files with 4 additions and 4 deletions
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8
ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c
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@ -79,11 +79,11 @@ ArmVirtGicArchLibConstructor (
// RegProp[0..1] == { GICD base, GICD size } // RegProp[0..1] == { GICD base, GICD size }
DistBase = SwapBytes64 (Reg[0]); DistBase = SwapBytes64 (Reg[0]);
ASSERT (DistBase < MAX_UINT32); ASSERT (DistBase < MAX_UINTN);
// RegProp[2..3] == { GICR base, GICR size } // RegProp[2..3] == { GICR base, GICR size }
RedistBase = SwapBytes64 (Reg[2]); RedistBase = SwapBytes64 (Reg[2]);
ASSERT (RedistBase < MAX_UINT32); ASSERT (RedistBase < MAX_UINTN);
PcdSet64 (PcdGicDistributorBase, DistBase); PcdSet64 (PcdGicDistributorBase, DistBase);
PcdSet64 (PcdGicRedistributorsBase, RedistBase); PcdSet64 (PcdGicRedistributorsBase, RedistBase);
@ -117,8 +117,8 @@ ArmVirtGicArchLibConstructor (
DistBase = SwapBytes64 (Reg[0]); DistBase = SwapBytes64 (Reg[0]);
CpuBase = SwapBytes64 (Reg[2]); CpuBase = SwapBytes64 (Reg[2]);
ASSERT (DistBase < MAX_UINT32); ASSERT (DistBase < MAX_UINTN);
ASSERT (CpuBase < MAX_UINT32); ASSERT (CpuBase < MAX_UINTN);
PcdSet64 (PcdGicDistributorBase, DistBase); PcdSet64 (PcdGicDistributorBase, DistBase);
PcdSet64 (PcdGicInterruptInterfaceBase, CpuBase); PcdSet64 (PcdGicInterruptInterfaceBase, CpuBase);