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ArmPlatformPkg/ArmVExpressPkg: switch to ASM_FUNC() asm macro 

Annotate functions with ASM_FUNC() so that they are emitted into
separate sections.

While we're at it, replace some inefficient uses of LoadConstantToReg()

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
This commit is contained in:
Ard Biesheuvel 2016-08-10 16:51:11 +02:00
parent 13dc7fa5a0
commit 04209b5354
5 changed files with 41 additions and 111 deletions
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22
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S
View File

@ -16,22 +16,14 @@
#include <ArmPlatform.h>
.text
.align 2
GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
ASM_PFX(ArmPlatformPeiBootAction):
ASM_FUNC(ArmPlatformPeiBootAction)
bx lr
//UINTN
//ArmPlatformGetCorePosition (
// IN UINTN MpId
// );
ASM_PFX(ArmPlatformGetCorePosition):
ASM_FUNC(ArmPlatformGetCorePosition)
and r1, r0, #ARM_CORE_MASK
and r0, r0, #ARM_CLUSTER_MASK
add r0, r1, r0, LSR #7
@ -41,10 +33,10 @@ ASM_PFX(ArmPlatformGetCorePosition):
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
ASM_PFX(ArmPlatformIsPrimaryCore):
ASM_FUNC(ArmPlatformIsPrimaryCore)
// Extract cpu_id and cluster_id from ARM_SCC_CFGREG48
// with cpu_id[0:3] and cluster_id[4:7]
LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r1)
MOV32 (r1, ARM_CTA15A7_SCC_CFGREG48)
ldr r1, [r1]
lsr r1, #24
@ -58,7 +50,7 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
orr r1, r1, r2
// Keep the Cluster ID and Core ID from the MPID
LoadConstantToReg (ARM_CLUSTER_MASK | ARM_CORE_MASK, r2)
MOV32 (r2, ARM_CLUSTER_MASK | ARM_CORE_MASK)
and r0, r0, r2
// Compare mpid and boot cpu from ARM_SCC_CFGREG48
@ -71,10 +63,10 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
// Extract cpu_id and cluster_id from ARM_SCC_CFGREG48
// with cpu_id[0:3] and cluster_id[4:7]
LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r0)
MOV32 (r0, ARM_CTA15A7_SCC_CFGREG48)
ldr r0, [r0]
lsr r0, #24

28
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S
View File

@ -14,36 +14,22 @@
#include <AsmMacroIoLib.h>
#include <Library/ArmLib.h>
.text
.align 2
GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
//UINTN
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
ldr r0, [r0]
ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
MOV32 (r0, FixedPcdGet32 (PcdArmPrimaryCore))
bx lr
//UINTN
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
ASM_PFX(ArmPlatformIsPrimaryCore):
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
ldr r1, [r1]
ASM_FUNC(ArmPlatformIsPrimaryCore)
MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCoreMask))
and r0, r0, r1
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
ldr r1, [r1]
MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCore))
cmp r0, r1
moveq r0, #1
movne r0, #0
@ -53,11 +39,11 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
//ArmPlatformGetCorePosition (
// IN UINTN MpId
// );
ASM_PFX(ArmPlatformGetCorePosition):
ASM_FUNC(ArmPlatformGetCorePosition)
and r0, r0, #ARM_CORE_MASK
bx lr
ASM_PFX(ArmPlatformPeiBootAction):
ASM_FUNC(ArmPlatformPeiBootAction)
bx lr
ASM_FUNCTION_REMOVE_IF_UNREFERENCED

38
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/AArch64/RTSMHelper.S
View File

@ -12,53 +12,33 @@
#
#include <AsmMacroIoLibV8.h>
#include <Base.h>
#include <Library/ArmLib.h>
#include <Library/PcdLib.h>
#include <AutoGen.h>
.text
.align 2
GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
GCC_ASM_EXPORT(ArmGetCpuCountPerCluster)
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdCoreCount)
ASM_PFX(ArmPlatformPeiBootAction):
ASM_FUNC(ArmPlatformPeiBootAction)
ret
//UINTN
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x0)
ldrh w0, [x0]
ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
MOV32 (w0, FixedPcdGet32 (PcdArmPrimaryCore))
ret
# IN None
# OUT x0 = number of cores present in the system
ASM_PFX(ArmGetCpuCountPerCluster):
LoadConstantToReg (_gPcd_FixedAtBuild_PcdCoreCount, x0)
ldrh w0, [x0]
ASM_FUNC(ArmGetCpuCountPerCluster)
MOV32 (w0, FixedPcdGet32 (PcdCoreCount))
ret
//UINTN
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
ASM_PFX(ArmPlatformIsPrimaryCore):
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, x1)
ldrh w1, [x1]
ASM_FUNC(ArmPlatformIsPrimaryCore)
MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCoreMask))
and x0, x0, x1
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x1)
ldrh w1, [x1]
MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCore))
cmp w0, w1
b.ne 1f
mov x0, #1
@ -72,7 +52,7 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
// IN UINTN MpId
// );
// With this function: CorePos = (ClusterId * 4) + CoreId
ASM_PFX(ArmPlatformGetCorePosition):
ASM_FUNC(ArmPlatformGetCorePosition)
and x1, x0, #ARM_CORE_MASK
and x0, x0, #ARM_CLUSTER_MASK
add x0, x1, x0, LSR #6

41
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S
View File

@ -12,32 +12,16 @@
#
#include <AsmMacroIoLib.h>
#include <Base.h>
#include <Library/ArmLib.h>
#include <Library/PcdLib.h>
#include <AutoGen.h>
#include "AsmMacroIoLib.inc"
#include <Chipset/ArmCortexA9.h>
.text
.align 2
GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
GCC_ASM_EXPORT(ArmGetCpuCountPerCluster)
GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
ASM_PFX(ArmPlatformPeiBootAction):
ASM_FUNC(ArmPlatformPeiBootAction)
bx lr
# IN None
# OUT r0 = SCU Base Address
ASM_PFX(ArmGetScuBaseAddress):
ASM_FUNC(ArmGetScuBaseAddress)
# Read Configuration Base Address Register. ArmCBar cannot be called to get
# the Configuration BAR as a stack is not necessary setup. The SCU is at the
# offset 0x0000 from the Private Memory Region.
@ -48,14 +32,13 @@ ASM_PFX(ArmGetScuBaseAddress):
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
ldr r0, [r0]
ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
MOV32 (r0, FixedPcdGet32 (PcdArmPrimaryCore))
bx lr
# IN None
# OUT r0 = number of cores present in the system
ASM_PFX(ArmGetCpuCountPerCluster):
ASM_FUNC(ArmGetCpuCountPerCluster)
stmfd SP!, {r1-r2}
# Read CP15 MIDR
@ -63,10 +46,10 @@ ASM_PFX(ArmGetCpuCountPerCluster):
# Check if the CPU is A15
mov r1, r1, LSR #4
LoadConstantToReg (ARM_CPU_TYPE_MASK, r0)
MOV32 (r0, ARM_CPU_TYPE_MASK)
and r1, r1, r0
LoadConstantToReg (ARM_CPU_TYPE_A15, r0)
MOV32 (r0, ARM_CPU_TYPE_A15)
cmp r1, r0
beq _Read_cp15_reg
@ -92,12 +75,10 @@ _Return:
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
ASM_PFX(ArmPlatformIsPrimaryCore):
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
ldr r1, [r1]
ASM_FUNC(ArmPlatformIsPrimaryCore)
MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCoreMask))
and r0, r0, r1
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
ldr r1, [r1]
MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCore))
cmp r0, r1
moveq r0, #1
movne r0, #0
@ -107,7 +88,7 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
//ArmPlatformGetCorePosition (
// IN UINTN MpId
// );
ASM_PFX(ArmPlatformGetCorePosition):
ASM_FUNC(ArmPlatformGetCorePosition)
and r1, r0, #ARM_CORE_MASK
and r0, r0, #ARM_CLUSTER_MASK
add r0, r1, r0, LSR #7

23
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.S
View File

@ -12,18 +12,9 @@
//
#include <AsmMacroIoLib.h>
#include <Base.h>
#include <Library/ArmPlatformLib.h>
#include <Drivers/PL35xSmc.h>
#include <ArmPlatform.h>
#include <AutoGen.h>
.text
.align 3
GCC_ASM_EXPORT(ArmPlatformSecBootAction)
GCC_ASM_EXPORT(ArmPlatformSecBootMemoryInit)
GCC_ASM_IMPORT(PL35xSmcInitialize)
//
// For each Chip Select: ChipSelect / SetCycle / SetOpMode
@ -69,7 +60,7 @@ VersatileExpressSmcConfigurationEnd:
Note: This function must be implemented in assembler as there is no stack set up yet
**/
ASM_PFX(ArmPlatformSecBootAction):
ASM_FUNC(ArmPlatformSecBootAction)
bx lr
/**
@ -82,21 +73,21 @@ ASM_PFX(ArmPlatformSecBootAction):
pointer is not used (probably required to use assembly language)
**/
ASM_PFX(ArmPlatformSecBootMemoryInit):
ASM_FUNC(ArmPlatformSecBootMemoryInit)
mov r5, lr
//
// Initialize PL354 SMC
//
LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)
LoadConstantToReg (VersatileExpressSmcConfiguration, r2)
LoadConstantToReg (VersatileExpressSmcConfigurationEnd, r3)
MOV32 (r1, ARM_VE_SMC_CTRL_BASE)
MOV32 (r2, VersatileExpressSmcConfiguration)
MOV32 (r3, VersatileExpressSmcConfigurationEnd)
blx ASM_PFX(PL35xSmcInitialize)
//
// Page mode setup for VRAM
//
LoadConstantToReg (VRAM_MOTHERBOARD_BASE, r2)
MOV32 (r2, VRAM_MOTHERBOARD_BASE)
// Read current state
ldr r0, [r2, #0]
@ -110,7 +101,7 @@ ASM_PFX(ArmPlatformSecBootMemoryInit):
ldr r0, [r2, #0]
ldr r0, = 0x00000000
str r0, [r2, #0]
LoadConstantToReg (0x00900090, r0)
ldr r0, = 0x00900090
str r0, [r2, #0]
// Confirm page mode enabled