mirror of https://github.com/acidanthera/audk.git
ArmPkg/ArmMmuLib: Disable and re-enable MMU only when needed
When updating a page table descriptor in a way that requires break before make, we temporarily disable the MMU to ensure that we don't unmap the memory region that the code itself is executing from. However, this is a condition we can check in a straight-forward manner, and if the regions are disjoint, we don't have to bother with the MMU controls, and we can just perform an ordinary break before make. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
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@ -52,9 +52,10 @@ ArmClearMemoryRegionReadOnly (
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VOID
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EFIAPI
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ArmReplaceLiveTranslationEntry (
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IN UINT64 *Entry,
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IN UINT64 Value,
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IN UINT64 RegionStart
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IN UINT64 *Entry,
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IN UINT64 Value,
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IN UINT64 RegionStart,
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IN BOOLEAN DisableMmu
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);
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EFI_STATUS
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@ -18,6 +18,17 @@
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#include <Library/ArmMmuLib.h>
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#include <Library/BaseLib.h>
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#include <Library/DebugLib.h>
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#include <Library/HobLib.h>
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STATIC
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VOID (
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EFIAPI *mReplaceLiveEntryFunc
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)(
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IN UINT64 *Entry,
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IN UINT64 Value,
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IN UINT64 RegionStart,
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IN BOOLEAN DisableMmu
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) = ArmReplaceLiveTranslationEntry;
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STATIC
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UINT64
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@ -83,14 +94,40 @@ ReplaceTableEntry (
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IN UINT64 *Entry,
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IN UINT64 Value,
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IN UINT64 RegionStart,
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IN UINT64 BlockMask,
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IN BOOLEAN IsLiveBlockMapping
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)
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{
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if (!ArmMmuEnabled () || !IsLiveBlockMapping) {
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BOOLEAN DisableMmu;
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//
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// Replacing a live block entry with a table entry (or vice versa) requires a
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// break-before-make sequence as per the architecture. This means the mapping
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// must be made invalid and cleaned from the TLBs first, and this is a bit of
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// a hassle if the mapping in question covers the code that is actually doing
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// the mapping and the unmapping, and so we only bother with this if actually
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// necessary.
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//
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if (!IsLiveBlockMapping || !ArmMmuEnabled ()) {
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// If the mapping is not a live block mapping, or the MMU is not on yet, we
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// can simply overwrite the entry.
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*Entry = Value;
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ArmUpdateTranslationTableEntry (Entry, (VOID *)(UINTN)RegionStart);
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} else {
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ArmReplaceLiveTranslationEntry (Entry, Value, RegionStart);
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// If the mapping in question does not cover the code that updates the
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// entry in memory, or the entry that we are intending to update, we can
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// use an ordinary break before make. Otherwise, we will need to
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// temporarily disable the MMU.
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DisableMmu = FALSE;
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if ((((RegionStart ^ (UINTN)ArmReplaceLiveTranslationEntry) & ~BlockMask) == 0) ||
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(((RegionStart ^ (UINTN)Entry) & ~BlockMask) == 0))
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{
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DisableMmu = TRUE;
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DEBUG ((DEBUG_WARN, "%a: splitting block entry with MMU disabled\n", __FUNCTION__));
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}
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ArmReplaceLiveTranslationEntry (Entry, Value, RegionStart, DisableMmu);
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}
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}
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@ -155,12 +192,13 @@ IsTableEntry (
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STATIC
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EFI_STATUS
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UpdateRegionMappingRecursive (
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IN UINT64 RegionStart,
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IN UINT64 RegionEnd,
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IN UINT64 AttributeSetMask,
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IN UINT64 AttributeClearMask,
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IN UINT64 *PageTable,
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IN UINTN Level
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IN UINT64 RegionStart,
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IN UINT64 RegionEnd,
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IN UINT64 AttributeSetMask,
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IN UINT64 AttributeClearMask,
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IN UINT64 *PageTable,
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IN UINTN Level,
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IN BOOLEAN TableIsLive
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)
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{
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UINTN BlockShift;
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@ -170,6 +208,7 @@ UpdateRegionMappingRecursive (
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UINT64 EntryValue;
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VOID *TranslationTable;
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EFI_STATUS Status;
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BOOLEAN NextTableIsLive;
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ASSERT (((RegionStart | RegionEnd) & EFI_PAGE_MASK) == 0);
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@ -198,7 +237,14 @@ UpdateRegionMappingRecursive (
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// the next level. No block mappings are allowed at all at level 0,
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// so in that case, we have to recurse unconditionally.
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//
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// One special case to take into account is any region that covers the page
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// table itself: if we'd cover such a region with block mappings, we are
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// more likely to end up in the situation later where we need to disable
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// the MMU in order to update page table entries safely, so prefer page
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// mappings in that particular case.
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//
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if ((Level == 0) || (((RegionStart | BlockEnd) & BlockMask) != 0) ||
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((Level < 3) && (((UINT64)PageTable & ~BlockMask) == RegionStart)) ||
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IsTableEntry (*Entry, Level))
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{
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ASSERT (Level < 3);
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@ -234,7 +280,8 @@ UpdateRegionMappingRecursive (
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*Entry & TT_ATTRIBUTES_MASK,
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0,
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TranslationTable,
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Level + 1
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Level + 1,
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FALSE
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);
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if (EFI_ERROR (Status)) {
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//
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@ -246,8 +293,11 @@ UpdateRegionMappingRecursive (
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return Status;
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}
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}
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NextTableIsLive = FALSE;
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} else {
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TranslationTable = (VOID *)(UINTN)(*Entry & TT_ADDRESS_MASK_BLOCK_ENTRY);
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NextTableIsLive = TableIsLive;
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}
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//
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@ -259,7 +309,8 @@ UpdateRegionMappingRecursive (
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AttributeSetMask,
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AttributeClearMask,
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TranslationTable,
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Level + 1
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Level + 1,
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NextTableIsLive
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);
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if (EFI_ERROR (Status)) {
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if (!IsTableEntry (*Entry, Level)) {
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@ -282,7 +333,8 @@ UpdateRegionMappingRecursive (
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Entry,
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EntryValue,
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RegionStart,
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IsBlockEntry (*Entry, Level)
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BlockMask,
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TableIsLive && IsBlockEntry (*Entry, Level)
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);
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}
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} else {
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@ -291,7 +343,7 @@ UpdateRegionMappingRecursive (
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EntryValue |= (Level == 3) ? TT_TYPE_BLOCK_ENTRY_LEVEL3
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: TT_TYPE_BLOCK_ENTRY;
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ReplaceTableEntry (Entry, EntryValue, RegionStart, FALSE);
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ReplaceTableEntry (Entry, EntryValue, RegionStart, BlockMask, FALSE);
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}
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}
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@ -301,10 +353,11 @@ UpdateRegionMappingRecursive (
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STATIC
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EFI_STATUS
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UpdateRegionMapping (
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IN UINT64 RegionStart,
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IN UINT64 RegionLength,
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IN UINT64 AttributeSetMask,
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IN UINT64 AttributeClearMask
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IN UINT64 RegionStart,
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IN UINT64 RegionLength,
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IN UINT64 AttributeSetMask,
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IN UINT64 AttributeClearMask,
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IN BOOLEAN TableIsLive
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)
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{
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UINTN T0SZ;
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@ -321,7 +374,8 @@ UpdateRegionMapping (
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AttributeSetMask,
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AttributeClearMask,
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ArmGetTTBR0BaseAddress (),
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GetRootTableLevel (T0SZ)
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GetRootTableLevel (T0SZ),
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TableIsLive
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);
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}
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@ -336,7 +390,8 @@ FillTranslationTable (
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MemoryRegion->VirtualBase,
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MemoryRegion->Length,
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ArmMemoryAttributeToPageAttribute (MemoryRegion->Attributes) | TT_AF,
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0
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0,
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FALSE
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);
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}
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@ -410,7 +465,8 @@ ArmSetMemoryAttributes (
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BaseAddress,
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Length,
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PageAttributes,
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PageAttributeMask
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PageAttributeMask,
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TRUE
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);
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}
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@ -423,7 +479,13 @@ SetMemoryRegionAttribute (
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IN UINT64 BlockEntryMask
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)
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{
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return UpdateRegionMapping (BaseAddress, Length, Attributes, BlockEntryMask);
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return UpdateRegionMapping (
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BaseAddress,
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Length,
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Attributes,
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BlockEntryMask,
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TRUE
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);
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}
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EFI_STATUS
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@ -12,6 +12,14 @@
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.macro __replace_entry, el
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// check whether we should disable the MMU
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cbz x3, .L1_\@
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// clean and invalidate first so that we don't clobber
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// adjacent entries that are dirty in the caches
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dc civac, x0
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dsb nsh
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// disable the MMU
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mrs x8, sctlr_el\el
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bic x9, x8, #CTRL_M_BIT
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// re-enable the MMU
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msr sctlr_el\el, x8
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isb
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b .L2_\@
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.L1_\@:
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// write invalid entry
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str xzr, [x0]
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dsb nshst
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// flush translations for the target address from the TLBs
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lsr x2, x2, #12
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.if \el == 1
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tlbi vaae1, x2
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.else
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tlbi vae\el, x2
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.endif
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dsb nsh
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// write updated entry
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str x1, [x0]
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dsb nshst
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.L2_\@:
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.endm
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// Align this routine to a log2 upper bound of its size, so that it is
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// guaranteed not to cross a page or block boundary.
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.balign 0x200
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//VOID
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//ArmReplaceLiveTranslationEntry (
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// IN UINT64 *Entry,
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@ -53,12 +86,7 @@ ASM_FUNC(ArmReplaceLiveTranslationEntry)
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msr daifset, #0xf
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isb
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// clean and invalidate first so that we don't clobber
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// adjacent entries that are dirty in the caches
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dc civac, x0
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dsb nsh
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EL1_OR_EL2_OR_EL3(x3)
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EL1_OR_EL2_OR_EL3(x5)
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1:__replace_entry 1
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b 4f
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2:__replace_entry 2
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ASM_PFX(ArmReplaceLiveTranslationEntrySize):
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.long . - ArmReplaceLiveTranslationEntry
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// Double check that we did not overrun the assumed maximum size
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.org ArmReplaceLiveTranslationEntry + 0x200
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