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MdeModulePkg XhciPei/UsbBusPei: Enhance code for better device compatibility. 

1. Add delay after set device address and get configuration descriptor.
2. Sync the change at R15876 in XhciDxe to do not access transfer ring when endpoint is isochronous type or control type.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16105 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Star Zeng 2014-09-15 09:33:16 +00:00 committed by lzeng14
parent c4a7d20890
commit 04910ceb35
3 changed files with 40 additions and 6 deletions
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32
MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c
View File

@ -1706,7 +1706,12 @@ XhcPeiSetConfigCmd (
InputContext->EP[Dci-1].CErr = 0;
InputContext->EP[Dci-1].EPType = ED_ISOCH_OUT;
}
break;
//
// Do not support isochronous transfer now.
//
DEBUG ((EFI_D_INFO, "XhcPeiSetConfigCmd: Unsupport ISO EP found, Transfer ring is not allocated.\n"));
EpDesc = (USB_ENDPOINT_DESCRIPTOR *)((UINTN)EpDesc + EpDesc->Length);
continue;
case USB_ENDPOINT_INTERRUPT:
if (Direction == EfiUsbDataIn) {
InputContext->EP[Dci-1].CErr = 3;
@ -1744,9 +1749,14 @@ XhcPeiSetConfigCmd (
break;
case USB_ENDPOINT_CONTROL:
//
// Do not support control transfer now.
//
DEBUG ((EFI_D_INFO, "XhcPeiSetConfigCmd: Unsupport Control EP found, Transfer ring is not allocated.\n"));
default:
ASSERT (FALSE);
break;
DEBUG ((EFI_D_INFO, "XhcPeiSetConfigCmd: Unknown EP found, Transfer ring is not allocated.\n"));
EpDesc = (USB_ENDPOINT_DESCRIPTOR *)((UINTN)EpDesc + EpDesc->Length);
continue;
}
PhyAddr = UsbHcGetPciAddrForHostAddr (
@ -1899,7 +1909,12 @@ XhcPeiSetConfigCmd64 (
InputContext->EP[Dci-1].CErr = 0;
InputContext->EP[Dci-1].EPType = ED_ISOCH_OUT;
}
break;
//
// Do not support isochronous transfer now.
//
DEBUG ((EFI_D_INFO, "XhcPeiSetConfigCmd64: Unsupport ISO EP found, Transfer ring is not allocated.\n"));
EpDesc = (USB_ENDPOINT_DESCRIPTOR *)((UINTN)EpDesc + EpDesc->Length);
continue;
case USB_ENDPOINT_INTERRUPT:
if (Direction == EfiUsbDataIn) {
InputContext->EP[Dci-1].CErr = 3;
@ -1937,9 +1952,14 @@ XhcPeiSetConfigCmd64 (
break;
case USB_ENDPOINT_CONTROL:
//
// Do not support control transfer now.
//
DEBUG ((EFI_D_INFO, "XhcPeiSetConfigCmd64: Unsupport Control EP found, Transfer ring is not allocated.\n"));
default:
ASSERT (0);
break;
DEBUG ((EFI_D_INFO, "XhcPeiSetConfigCmd64: Unknown EP found, Transfer ring is not allocated.\n"));
EpDesc = (USB_ENDPOINT_DESCRIPTOR *)((UINTN)EpDesc + EpDesc->Length);
continue;
}
PhyAddr = UsbHcGetPciAddrForHostAddr (

3
MdeModulePkg/Bus/Usb/UsbBusPei/UsbPeim.c
View File

@ -720,6 +720,7 @@ PeiConfigureUsbDevice (
DEBUG ((EFI_D_ERROR, "PeiUsbSetDeviceAddress Failed: %r\n", Status));
return Status;
}
MicroSecondDelay (USB_SET_DEVICE_ADDRESS_STALL);
PeiUsbDevice->DeviceAddress = *DeviceAddress;
@ -750,6 +751,7 @@ PeiConfigureUsbDevice (
if (EFI_ERROR (Status)) {
return Status;
}
MicroSecondDelay (USB_GET_CONFIG_DESCRIPTOR_STALL);
Status = PeiUsbSetConfiguration (
PeiServices,
@ -809,6 +811,7 @@ PeiUsbGetAllConfiguration (
DEBUG ((EFI_D_ERROR, "PeiUsbGet Config Descriptor First Failed\n"));
return Status;
}
MicroSecondDelay (USB_GET_CONFIG_DESCRIPTOR_STALL);
ConfigDesc = (EFI_USB_CONFIG_DESCRIPTOR *) PeiUsbDevice->ConfigurationData;
ConfigDescLength = ConfigDesc->TotalLength;

11
MdeModulePkg/Bus/Usb/UsbBusPei/UsbPeim.h
View File

@ -99,6 +99,17 @@ typedef struct {
//
#define USB_SET_PORT_POWER_STALL (2 * USB_BUS_1_MILLISECOND)
//
// Wait for set device address, refers to specification
// [USB20-9.2.6.3, it says 2ms]
//
#define USB_SET_DEVICE_ADDRESS_STALL (2 * USB_BUS_1_MILLISECOND)
//
// Wait for get configuration descriptor, set by experience
//
#define USB_GET_CONFIG_DESCRIPTOR_STALL (1 * USB_BUS_1_MILLISECOND)
/**
Submits control transfer to a target USB device.