diff --git a/UefiPayloadPkg/Include/Guid/UniversalPayloadBase.h b/UefiPayloadPkg/Include/Guid/UniversalPayloadBase.h
index 60f2aa37dd..26a999df8d 100644
--- a/UefiPayloadPkg/Include/Guid/UniversalPayloadBase.h
+++ b/UefiPayloadPkg/Include/Guid/UniversalPayloadBase.h
@@ -16,4 +16,14 @@ typedef struct {
EFI_PHYSICAL_ADDRESS Entry;
} UNIVERSAL_PAYLOAD_BASE;
+#define UNIVERSAL_PAYLOAD_BASE_REVISION 1
+
+#define N_NON_RELOCATABLE BIT31
+#define P_PREFETCHABLE BIT30
+#define SS_CONFIGURATION_SPACE 0
+#define SS_IO_SPACE BIT24
+#define SS_32BIT_MEMORY_SPACE BIT25
+#define SS_64BIT_MEMORY_SPACE BIT24+BIT25
+#define DWORDS_TO_NEXT_ADDR_TYPE 7
+
#endif // UNIVERSAL_PAYLOAD_BASE_H_
diff --git a/UefiPayloadPkg/Include/Guid/UniversalPayloadSerialPortDeviceParentInfo.h b/UefiPayloadPkg/Include/Guid/UniversalPayloadSerialPortDeviceParentInfo.h
new file mode 100644
index 0000000000..969befe2cb
--- /dev/null
+++ b/UefiPayloadPkg/Include/Guid/UniversalPayloadSerialPortDeviceParentInfo.h
@@ -0,0 +1,28 @@
+/** @file
+ Universal Payload serial port parent device information definitions.
+
+Copyright (c) 2024, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef UNIVERSAL_PAYLOAD_SERIAL_PORT_PARENT_DEVICE_INFO_
+#define UNIVERSAL_PAYLOAD_SERIAL_PORT_PARENT_DEVICE_INFO_
+
+extern GUID gUniversalPayloadSerialPortParentDeviceInfoGuid;
+
+// IsIsaCompatible
+// TRUE: the serial port device is under an ISA compatible bus, which means the parent device is ISA/LPC/eSPI bus controller.
+// FALSE: the serial port device is native PCI device under PCI bridge.
+#pragma pack(1)
+typedef struct {
+ UINT32 Revision;
+ BOOLEAN IsIsaCompatible;
+ UINT8 Reserved[3];
+ UINT64 ParentDevicePcieBaseAddress;
+} UNIVERSAL_PAYLOAD_SERIAL_PORT_PARENT_DEVICE_INFO;
+#pragma pack()
+
+#define UNIVERSAL_PAYLOAD_SERIAL_PORT_PARENT_DEVICE_INFO_REVISION 1
+
+#endif // UNIVERSAL_PAYLOAD_SERIAL_PORT_PARENT_DEVICE_INFO_
diff --git a/UefiPayloadPkg/Include/Library/BuildFdtLib.h b/UefiPayloadPkg/Include/Library/BuildFdtLib.h
new file mode 100644
index 0000000000..2bde7ab66a
--- /dev/null
+++ b/UefiPayloadPkg/Include/Library/BuildFdtLib.h
@@ -0,0 +1,22 @@
+/** @file
+ This library will Build the FDT (flat device tree) table information.
+
+ Copyright (c) 2024, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef BUILD_FDT_LIB_H_
+#define BUILD_FDT__LIB_H_
+
+/**
+ It will build FDT for UPL consumed.
+ @param[in] FdtBase Address of the Fdt data.
+ @retval EFI_SUCCESS If it completed successfully.
+ @retval Others If it failed to build required FDT.
+**/
+
+BuildFdtForUPL (
+ IN VOID *FdtBase
+ );
+
+#endif
diff --git a/UefiPayloadPkg/Include/Library/FdtParserLib.h b/UefiPayloadPkg/Include/Library/FdtParserLib.h
new file mode 100644
index 0000000000..87109f1190
--- /dev/null
+++ b/UefiPayloadPkg/Include/Library/FdtParserLib.h
@@ -0,0 +1,64 @@
+/** @file
+ This library will parse the FDT (flat device tree) table information.
+
+ Copyright (c) 2024, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef FDT_PARSER_LIB_H_
+#define FDT_PARSER_LIB_H_
+
+/**
+ It will parse FDT based on DTB.
+
+ @param[in] FdtBase Address of the Fdt data.
+
+ @retval EFI_SUCCESS If it completed successfully.
+ @retval Others If it failed to parse DTB.
+**/
+UINTN
+EFIAPI
+ParseDtb (
+ IN VOID *FdtBase
+ );
+
+/**
+ It will Parse FDT -node based on information.
+ @param[in] FdtBase The starting memory address of FdtBase
+ @retval HobList The base address of Hoblist.
+
+**/
+UINT64
+EFIAPI
+FdtNodeParser (
+ IN VOID *FdtBase
+ );
+
+/**
+ It will Parse FDT -custom node based on information.
+ @param[in] FdtBase The starting memory address of FdtBase
+ @param[in] HostList The starting memory address of New Hob list.
+
+**/
+UINTN
+EFIAPI
+CustomFdtNodeParser (
+ IN VOID *FdtBase,
+ IN VOID *HostList
+ );
+
+/**
+ It will initialize HOBs for UPL.
+
+ @param[in] FdtBase Address of the Fdt data.
+
+ @retval EFI_SUCCESS If it completed successfully.
+ @retval Others If it failed to initialize HOBs.
+**/
+UINTN
+EFIAPI
+UplInitHob (
+ IN VOID *FdtBase
+ );
+
+#endif
diff --git a/UefiPayloadPkg/Include/Library/HobParserLib.h b/UefiPayloadPkg/Include/Library/HobParserLib.h
new file mode 100644
index 0000000000..98a64b8097
--- /dev/null
+++ b/UefiPayloadPkg/Include/Library/HobParserLib.h
@@ -0,0 +1,70 @@
+/** @file
+ This library will provide services for handling HOB data.
+
+ Copyright (c) 2024, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef HOB_PARSER_LIB_H_
+#define HOB_PARSER_LIB_H_
+
+/**
+ *
+ Add HOB into HOB list
+
+ @param[in] Hob The HOB to be added into the HOB list.
+**/
+VOID
+AddNewHob (
+ IN EFI_PEI_HOB_POINTERS *Hob
+ );
+
+/**
+ Found the Resource Descriptor HOB that contains a range (Base, Top)
+
+ @param[in] HobList Hob start address
+ @param[in] Base Memory start address
+ @param[in] Top Memory end address.
+
+ @retval The pointer to the Resource Descriptor HOB.
+**/
+EFI_HOB_RESOURCE_DESCRIPTOR *
+FindResourceDescriptorByRange (
+ IN VOID *HobList,
+ IN EFI_PHYSICAL_ADDRESS Base,
+ IN EFI_PHYSICAL_ADDRESS Top
+ );
+
+/**
+ Find the highest below 4G memory resource descriptor, except the input Resource Descriptor.
+
+ @param[in] HobList Hob start address
+ @param[in] MinimalNeededSize Minimal needed size.
+ @param[in] ExceptResourceHob Ignore this Resource Descriptor.
+
+ @retval The pointer to the Resource Descriptor HOB.
+**/
+EFI_HOB_RESOURCE_DESCRIPTOR *
+FindAnotherHighestBelow4GResourceDescriptor (
+ IN VOID *HobList,
+ IN UINTN MinimalNeededSize,
+ IN EFI_HOB_RESOURCE_DESCRIPTOR *ExceptResourceHob
+ );
+
+/**
+ Check the HOB and decide if it is need inside Payload
+
+ Payload maintainer may make decision which HOB is need or needn't
+ Then add the check logic in the function.
+
+ @param[in] Hob The HOB to check
+
+ @retval TRUE If HOB is need inside Payload
+ @retval FALSE If HOB is needn't inside Payload
+**/
+BOOLEAN
+IsHobNeed (
+ EFI_PEI_HOB_POINTERS Hob
+ );
+
+#endif
diff --git a/UefiPayloadPkg/Include/UniversalPayload/DeviceTree.h b/UefiPayloadPkg/Include/UniversalPayload/DeviceTree.h
new file mode 100644
index 0000000000..b7c2163e1e
--- /dev/null
+++ b/UefiPayloadPkg/Include/UniversalPayload/DeviceTree.h
@@ -0,0 +1,30 @@
+/** @file
+ This file defines the structure for the PCI Root Bridges.
+
+ Copyright (c) 2024, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Revision Reference:
+ - Universal Payload Specification 0.8 (https://universalpayload.github.io/spec/)
+**/
+
+#ifndef UNIVERSAL_PAYLOAD_DEVICE_TREE_H_
+#define UNIVERSAL_PAYLOAD_DEVICE_TREE_H_
+
+#include
+#include
+
+#pragma pack (1)
+
+typedef struct {
+ UNIVERSAL_PAYLOAD_GENERIC_HEADER Header;
+ EFI_PHYSICAL_ADDRESS DeviceTreeAddress;
+} UNIVERSAL_PAYLOAD_DEVICE_TREE;
+
+#pragma pack()
+
+#define UNIVERSAL_PAYLOAD_DEVICE_TREE_REVISION 1
+
+extern GUID gUniversalPayloadDeviceTreeGuid;
+
+#endif // UNIVERSAL_PAYLOAD_SMBIOS_TABLE_H_
diff --git a/UefiPayloadPkg/UefiPayloadPkg.dec b/UefiPayloadPkg/UefiPayloadPkg.dec
index 23dcdf9a0c..4df8c211dc 100644
--- a/UefiPayloadPkg/UefiPayloadPkg.dec
+++ b/UefiPayloadPkg/UefiPayloadPkg.dec
@@ -27,6 +27,11 @@
## Include/Guid/UniversalPayloadBase.h
gUniversalPayloadBaseGuid = { 0x03d4c61d, 0x2713, 0x4ec5, {0xa1, 0xcc, 0x88, 0x3b, 0xe9, 0xdc, 0x18, 0xe5 } }
+ ## Include/Guid/UniversalPayloadSerialPortDeviceParentInfo.h
+ gUniversalPayloadSerialPortParentDeviceInfoGuid = { 0xc89c359c, 0xd316, 0x4ff8, {0xa9, 0x8f, 0x60, 0x7d, 0x2c, 0xed, 0x1f, 0xed } }
+
+ ## Include/UniversalPayload/DeviceTree.h
+ gUniversalPayloadDeviceTreeGuid = { 0x6784b889, 0xb13c, 0x4c3b, {0xae, 0x4b, 0xf, 0xa, 0x2e, 0x32, 0xe, 0xa3 } }
gEdkiiDebugPrintErrorLevelGuid = { 0xad82f436, 0x75c5, 0x4aa9, { 0x92, 0x93, 0xc5, 0x55, 0x0a, 0x7f, 0xf9, 0x71 }}
gUefiAcpiBoardInfoGuid = {0xad3d31b, 0xb3d8, 0x4506, {0xae, 0x71, 0x2e, 0xf1, 0x10, 0x6, 0xd9, 0xf}}
gUefiSerialPortInfoGuid = { 0x6c6872fe, 0x56a9, 0x4403, { 0xbb, 0x98, 0x95, 0x8d, 0x62, 0xde, 0x87, 0xf1 } }
@@ -42,6 +47,13 @@
[Ppis]
gEfiPayLoadHobBasePpiGuid = { 0xdbe23aa1, 0xa342, 0x4b97, {0x85, 0xb6, 0xb2, 0x26, 0xf1, 0x61, 0x73, 0x89} }
+ #
+ # This PPI is used to trigger Payload callback event in end of PEI.
+ #
+ gUplReadyToPayloadPpiGuid = { 0x67c8dfb1, 0x61f4, 0x439c, { 0x84, 0x4e, 0x2b, 0xdf, 0xf1, 0x07, 0xad, 0x51 }}
+
+[Protocols]
+
################################################################################
#
# PCD Declarations section - list of all PCDs Declared by this Package
@@ -75,3 +87,18 @@ gUefiPayloadPkgTokenSpaceGuid.PcdBootManagerEscape|FALSE|BOOLEAN|0x00000020
## FFS filename to find the default variable initial data file.
# @Prompt FFS Name of variable initial data file
gUefiPayloadPkgTokenSpaceGuid.PcdNvsDataFile |{ 0x1a, 0xf1, 0xb1, 0xae, 0x42, 0xcc, 0xcf, 0x4e, 0xac, 0x60, 0xdb, 0xab, 0xf6, 0xca, 0x69, 0xe6 }|VOID*|0x00000025
+
+
+## Indicates if Universal payload support FDT
+#- PcdHandOffFdtEnable is TRUE, HandOffData is FDT
+#- PcdHandOffFdtEnable is FALSE, HandOffData is HOB
+gUefiPayloadPkgTokenSpaceGuid.PcdHandOffFdtEnable|FALSE|BOOLEAN|0x00000026
+
+
+gUefiPayloadPkgTokenSpaceGuid.PcdPciReservedPMemBase |0xFFFFFFFF |UINT32|0x00000027
+gUefiPayloadPkgTokenSpaceGuid.PcdPciReservedPMemLimit |0x00000000 |UINT32|0x00000028
+gUefiPayloadPkgTokenSpaceGuid.PcdPciReservedPMemAbove4GBBase |0xFFFFFFFFFFFFFFFF |UINT64|0x00000029
+gUefiPayloadPkgTokenSpaceGuid.PcdPciReservedPMemAbove4GBLimit|0x0000000000000000 |UINT64|0x0000002A
+
+gUefiPayloadPkgTokenSpaceGuid.SizeOfIoSpace|0|UINT8|0x0000002B
+gUefiPayloadPkgTokenSpaceGuid.PcdFDTPageSize|8|UINT8|0x0000002C