mirror of https://github.com/acidanthera/audk.git
SecurityPkg: Tcg: New field for User Confirmation Status
Add a new field in TcgNVS for PP operation user confirmation status, instead of previous logic overriding Request. Previous logic causes Get Pending TPM Operation Requested sub function return wrong value. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Yao Jiewen <jiewen.yao@intel.com> Reviewed-by: Long Qin <qin.long@intel.com>
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@ -135,8 +135,8 @@ PhysicalPresenceCallback (
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mTcgNvs->PhysicalPresence.RequestParameter
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);
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} else if (mTcgNvs->PhysicalPresence.Parameter == TCG_ACPI_FUNCTION_GET_USER_CONFIRMATION_STATUS_FOR_REQUEST) {
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mTcgNvs->PhysicalPresence.ReturnCode = Tcg2PhysicalPresenceLibGetUserConfirmationStatusFunction (mTcgNvs->PhysicalPresence.Request);
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}
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mTcgNvs->PhysicalPresence.ReturnCode = Tcg2PhysicalPresenceLibGetUserConfirmationStatusFunction (mTcgNvs->PPRequestUserConfirm);
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}
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return EFI_SUCCESS;
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}
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@ -62,6 +62,7 @@ typedef struct {
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typedef struct {
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PHYSICAL_PRESENCE_NVS PhysicalPresence;
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MEMORY_CLEAR_NVS MemoryClear;
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UINT32 PPRequestUserConfirm;
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} TCG_NVS;
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typedef struct {
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@ -79,7 +79,8 @@ DefinitionBlock (
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MCIN, 8, // Software SMI for Memory Clear Interface
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MCIP, 32, // Used for save the Mor paramter
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MORD, 32, // Memory Overwrite Request Data
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MRET, 32 // Memory Overwrite function return code
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MRET, 32, // Memory Overwrite function return code
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UCRQ, 32 // Phyical Presence request operation to Get User Confirmation Status
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}
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Method (PTS, 1, Serialized)
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@ -274,7 +275,7 @@ DefinitionBlock (
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// e) Get User Confirmation Status for Operation
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//
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Store (8, PPIP)
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Store (DerefOf (Index (Arg2, 0x00)), PPRQ)
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Store (DerefOf (Index (Arg2, 0x00)), UCRQ)
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//
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// Triggle the SMI interrupt
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@ -8,7 +8,7 @@
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PhysicalPresenceCallback() and MemoryClearCallback() will receive untrusted input and do some check.
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Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -152,7 +152,7 @@ PhysicalPresenceCallback (
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RequestConfirmed = FALSE;
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switch (mTcgNvs->PhysicalPresence.Request) {
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switch (mTcgNvs->PPRequestUserConfirm) {
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case PHYSICAL_PRESENCE_ENABLE:
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case PHYSICAL_PRESENCE_DISABLE:
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case PHYSICAL_PRESENCE_ACTIVATE:
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@ -1,7 +1,7 @@
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/** @file
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The header file for TCG SMM driver.
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Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -58,6 +58,7 @@ typedef struct {
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typedef struct {
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PHYSICAL_PRESENCE_NVS PhysicalPresence;
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MEMORY_CLEAR_NVS MemoryClear;
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UINT32 PPRequestUserConfirm;
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} TCG_NVS;
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typedef struct {
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@ -2,7 +2,7 @@
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The TPM definition block in ACPI table for physical presence
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and MemoryClear.
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Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -78,7 +78,8 @@ DefinitionBlock (
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MCIN, 8, // Software SMI for Memory Clear Interface
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MCIP, 32, // Used for save the Mor paramter
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MORD, 32, // Memory Overwrite Request Data
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MRET, 32 // Memory Overwrite function return code
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MRET, 32, // Memory Overwrite function return code
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UCRQ, 32 // Phyical Presence request operation to Get User Confirmation Status
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}
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Method (PTS, 1, Serialized)
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@ -269,7 +270,7 @@ DefinitionBlock (
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// e) Get User Confirmation Status for Operation
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//
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Store (8, PPIP)
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Store (DerefOf (Index (Arg2, 0x00)), PPRQ)
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Store (DerefOf (Index (Arg2, 0x00)), UCRQ)
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//
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// Triggle the SMI interrupt
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