mirror of https://github.com/acidanthera/audk.git
MdePkg: Add CSR operation for LoongArch
Add CsrRead, CsrWrite and CsrXChg functions for LoongArch, and use them to operate the CSR register of LoongArch architecture. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Co-authored-by: Bibo Mao <maobibo@loongson.cn> Acked-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
This commit is contained in:
Chao Li
Liming Gao
parent
414ad233a5
commit
0565a8e885
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@ -351,6 +351,51 @@ AsmReadStableCounter (
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VOID
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);
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/**
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CSR read operation.
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@param[in] Select CSR read instruction select values.
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@return The return value of csrrd instruction, return -1 means no CSR instruction
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is found.
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**/
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UINTN
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CsrRead (
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IN UINT16 Select
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);
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/**
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CSR write operation.
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@param[in] Select CSR write instruction select values.
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@param[in] Value The csrwr will write the value.
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@return The return value of csrwr instruction, that is, store the old value of
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the register, return -1 means no CSR instruction is found.
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**/
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UINTN
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CsrWrite (
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IN UINT16 Select,
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IN UINTN Value
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);
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/**
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CSR exchange operation.
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@param[in] Select CSR exchange instruction select values.
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@param[in] Value The csrxchg will write the value.
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@param[in] Mask The csrxchg mask value.
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@return The return value of csrxchg instruction, that is, store the old value of
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the register, return -1 means no CSR instruction is found.
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**/
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UINTN
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CsrXChg (
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IN UINT16 Select,
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IN UINTN Value,
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IN UINTN Mask
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);
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#endif // defined (MDE_CPU_LOONGARCH64)
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//
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@ -410,7 +410,9 @@
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[Sources.LOONGARCH64]
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Math64.c
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Unaligned.c
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LoongArch64/Csr.c
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LoongArch64/InternalSwitchStack.c
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LoongArch64/AsmCsr.S | GCC
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LoongArch64/GetInterruptState.S | GCC
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LoongArch64/EnableInterrupts.S | GCC
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LoongArch64/DisableInterrupts.S | GCC
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@ -0,0 +1,422 @@
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#------------------------------------------------------------------------------
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#
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# LoongArch ASM CSR operation functions
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#
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# Copyright (c) 2024, Loongson Technology Corporation Limited. All rights reserved.<BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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#------------------------------------------------------------------------------
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#include <Register/LoongArch64/Csr.h>
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ASM_GLOBAL ASM_PFX (AsmCsrRead)
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ASM_GLOBAL ASM_PFX (AsmCsrWrite)
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ASM_GLOBAL ASM_PFX (AsmCsrXChg)
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.macro AsmCsrRd Sel
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csrrd $a0, \Sel
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jirl $zero, $ra, 0
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.endm
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.macro AsmCsrWr Sel
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csrwr $a0, \Sel
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jirl $zero, $ra, 0
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.endm
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.macro AsmCsrXChange Sel
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csrxchg $a0, $a1, \Sel
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jirl $zero, $ra, 0
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.endm
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ASM_PFX(AsmCsrRead):
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blt $a0, $zero, ReadSelNumErr
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li.w $t0, LOONGARCH_CSR_EBASE
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bltu $t0, $a0, TlbCsrRd
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BasicCsrRd:
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la.pcrel $t0, BasicCsrRead
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alsl.d $t0, $a0, $t0, 3
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jirl $zero, $t0, 0
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TlbCsrRd:
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li.w $t0, LOONGARCH_CSR_TLBIDX
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bltu $a0, $t0, ReadSelNumErr
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li.w $t0, LOONGARCH_CSR_RVACFG
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bltu $t0, $a0, CfgCsrRd
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la.pcrel $t0, TlbCsrRead
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addi.w $t1, $a0, -LOONGARCH_CSR_TLBIDX
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alsl.d $t0, $t1, $t0, 3
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jirl $zero, $t0, 0
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CfgCsrRd:
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li.w $t0, LOONGARCH_CSR_CPUNUM
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bltu $a0, $t0, ReadSelNumErr
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li.w $t0, LOONGARCH_CSR_PRCFG3
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bltu $t0, $a0, KcsCsrRd
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la.pcrel $t0, CfgCsrRead
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addi.w $t1, $a0, -LOONGARCH_CSR_CPUNUM
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alsl.d $t0, $t1, $t0, 3
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jirl $zero, $t0, 0
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KcsCsrRd:
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li.w $t0, LOONGARCH_CSR_KS0
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bltu $a0, $t0, ReadSelNumErr
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li.w $t0, LOONGARCH_CSR_KS8
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bltu $t0, $a0, StableTimerCsrRd
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la.pcrel $t0, KcsCsrRead
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addi.w $t1, $a0, -LOONGARCH_CSR_KS0
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alsl.d $t0, $t1, $t0, 3
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jirl $zero, $t0, 0
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StableTimerCsrRd:
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li.w $t0, LOONGARCH_CSR_TMID
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bltu $a0, $t0, ReadSelNumErr
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li.w $t0, LOONGARCH_CSR_TINTCLR
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bltu $t0, $a0, TlbRefillCsrRd
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la.pcrel $t0, StableTimerCsrRead
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addi.w $t1, $a0, -LOONGARCH_CSR_TMID
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alsl.d $t0, $t1, $t0, 3
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jirl $zero, $t0, 0
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TlbRefillCsrRd:
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li.w $t0, LOONGARCH_CSR_TLBREBASE
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bltu $a0, $t0, ReadSelNumErr
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li.w $t0, LOONGARCH_CSR_TLBREHI
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bltu $t0, $a0, DirMapCsrRd
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la.pcrel $t0, TlbRefillCsrRead
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addi.w $t1, $a0, -LOONGARCH_CSR_TLBREBASE
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alsl.d $t0, $t1, $t0, 3
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jirl $zero, $t0, 0
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DirMapCsrRd:
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li.w $t0, LOONGARCH_CSR_DMWIN0
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bltu $a0, $t0, ReadSelNumErr
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li.w $t0, LOONGARCH_CSR_DMWIN3
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bltu $t0, $a0, ReadSelNumErr
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la.pcrel $t0, DirMapCsrRead
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addi.w $t1, $a0, -LOONGARCH_CSR_DMWIN0
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alsl.d $t0, $t1, $t0, 3
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jirl $zero, $t0, 0
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ReadSelNumErr:
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addi.d $a0, $zero, -1
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jirl $zero, $ra, 0
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BasicCsrRead:
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CsrSel = LOONGARCH_CSR_CRMD
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.rept LOONGARCH_CSR_EBASE - LOONGARCH_CSR_CRMD + 1
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AsmCsrRd CsrSel
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CsrSel = CsrSel + 1
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.endr
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TlbCsrRead:
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CsrSel = LOONGARCH_CSR_TLBIDX
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.rept LOONGARCH_CSR_RVACFG - LOONGARCH_CSR_TLBIDX + 1
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AsmCsrRd CsrSel
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CsrSel = CsrSel + 1
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.endr
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CfgCsrRead:
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CsrSel = LOONGARCH_CSR_CPUNUM
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.rept LOONGARCH_CSR_PRCFG3 - LOONGARCH_CSR_CPUNUM + 1
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AsmCsrRd CsrSel
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CsrSel = CsrSel + 1
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.endr
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KcsCsrRead:
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CsrSel = LOONGARCH_CSR_KS0
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.rept LOONGARCH_CSR_KS8 - LOONGARCH_CSR_KS0 + 1
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AsmCsrRd CsrSel
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CsrSel = CsrSel + 1
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.endr
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StableTimerCsrRead:
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CsrSel = LOONGARCH_CSR_TMID
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.rept LOONGARCH_CSR_TINTCLR - LOONGARCH_CSR_TMID + 1
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AsmCsrRd CsrSel
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CsrSel = CsrSel + 1
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.endr
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TlbRefillCsrRead:
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CsrSel = LOONGARCH_CSR_TLBREBASE
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.rept LOONGARCH_CSR_TLBREHI - LOONGARCH_CSR_TLBREBASE + 1
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AsmCsrRd CsrSel
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CsrSel = CsrSel + 1
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.endr
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DirMapCsrRead:
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CsrSel = LOONGARCH_CSR_DMWIN0
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.rept LOONGARCH_CSR_DMWIN3 - LOONGARCH_CSR_DMWIN0 + 1
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AsmCsrRd CsrSel
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CsrSel = CsrSel + 1
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.endr
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ASM_PFX(AsmCsrWrite):
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blt $a0, $zero, WriteSelNumErr
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li.w $t0, LOONGARCH_CSR_EBASE
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bltu $t0, $a0, TlbCsrWr
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BasicCsrWr:
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la.pcrel $t0, BasicCsrWrite
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alsl.d $t0, $a0, $t0, 3
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move $a0, $a1
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jirl $zero, $t0, 0
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TlbCsrWr:
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li.w $t0, LOONGARCH_CSR_TLBIDX
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bltu $a0, $t0, WriteSelNumErr
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li.w $t0, LOONGARCH_CSR_RVACFG
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bltu $t0, $a0, CfgCsrWr
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la.pcrel $t0, TlbCsrWrite
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addi.w $t1, $a0, -LOONGARCH_CSR_TLBIDX
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alsl.d $t0, $t1, $t0, 3
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move $a0, $a1
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jirl $zero, $t0, 0
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CfgCsrWr:
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li.w $t0, LOONGARCH_CSR_CPUNUM
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bltu $a0, $t0, WriteSelNumErr
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li.w $t0, LOONGARCH_CSR_PRCFG3
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bltu $t0, $a0, KcsCsrWr
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la.pcrel $t0, CfgCsrWrite
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addi.w $t1, $a0, -LOONGARCH_CSR_CPUNUM
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alsl.d $t0, $t1, $t0, 3
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move $a0, $a1
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jirl $zero, $t0, 0
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KcsCsrWr:
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li.w $t0, LOONGARCH_CSR_KS0
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bltu $a0, $t0, WriteSelNumErr
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li.w $t0, LOONGARCH_CSR_KS8
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bltu $t0, $a0, StableTimerCsrWr
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la.pcrel $t0, KcsCsrWrite
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addi.w $t1, $a0, -LOONGARCH_CSR_KS0
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alsl.d $t0, $t1, $t0, 3
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move $a0, $a1
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jirl $zero, $t0, 0
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StableTimerCsrWr:
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li.w $t0, LOONGARCH_CSR_TMID
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bltu $a0, $t0, WriteSelNumErr
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li.w $t0, LOONGARCH_CSR_TINTCLR
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bltu $t0, $a0, TlbRefillCsrWr
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la.pcrel $t0, StableTimerCsrWrite
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addi.w $t1, $a0, -LOONGARCH_CSR_TMID
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alsl.d $t0, $t1, $t0, 3
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move $a0, $a1
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jirl $zero, $t0, 0
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TlbRefillCsrWr:
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li.w $t0, LOONGARCH_CSR_TLBREBASE
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bltu $a0, $t0, WriteSelNumErr
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li.w $t0, LOONGARCH_CSR_TLBREHI
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bltu $t0, $a0, DirMapCsrWr
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la.pcrel $t0, TlbRefillCsrWrite
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addi.w $t1, $a0, -LOONGARCH_CSR_TLBREBASE
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alsl.d $t0, $t1, $t0, 3
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move $a0, $a1
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jirl $zero, $t0, 0
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DirMapCsrWr:
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li.w $t0, LOONGARCH_CSR_DMWIN0
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bltu $a0, $t0, WriteSelNumErr
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li.w $t0, LOONGARCH_CSR_DMWIN3
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bltu $t0, $a0, WriteSelNumErr
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la.pcrel $t0, DirMapCsrWrite
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addi.w $t1, $a0, -LOONGARCH_CSR_DMWIN0
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alsl.d $t0, $t1, $t0, 3
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move $a0, $a1
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jirl $zero, $t0, 0
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WriteSelNumErr:
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addi.d $a0, $zero, -1
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jirl $zero, $ra, 0
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BasicCsrWrite:
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CsrSel = LOONGARCH_CSR_CRMD
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.rept LOONGARCH_CSR_EBASE - LOONGARCH_CSR_CRMD + 1
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AsmCsrWr CsrSel
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CsrSel = CsrSel + 1
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.endr
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TlbCsrWrite:
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CsrSel = LOONGARCH_CSR_TLBIDX
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.rept LOONGARCH_CSR_RVACFG - LOONGARCH_CSR_TLBIDX + 1
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AsmCsrWr CsrSel
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CsrSel = CsrSel + 1
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.endr
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CfgCsrWrite:
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CsrSel = LOONGARCH_CSR_CPUNUM
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.rept LOONGARCH_CSR_PRCFG3 - LOONGARCH_CSR_CPUNUM + 1
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AsmCsrWr CsrSel
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CsrSel = CsrSel + 1
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.endr
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KcsCsrWrite:
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CsrSel = LOONGARCH_CSR_KS0
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.rept LOONGARCH_CSR_KS8 - LOONGARCH_CSR_KS0 + 1
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AsmCsrWr CsrSel
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CsrSel = CsrSel + 1
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.endr
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StableTimerCsrWrite:
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CsrSel = LOONGARCH_CSR_TMID
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.rept LOONGARCH_CSR_TINTCLR - LOONGARCH_CSR_TMID + 1
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AsmCsrWr CsrSel
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CsrSel = CsrSel + 1
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.endr
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TlbRefillCsrWrite:
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CsrSel = LOONGARCH_CSR_TLBREBASE
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.rept LOONGARCH_CSR_TLBREHI - LOONGARCH_CSR_TLBREBASE + 1
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AsmCsrWr CsrSel
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CsrSel = CsrSel + 1
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.endr
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DirMapCsrWrite:
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CsrSel = LOONGARCH_CSR_DMWIN0
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.rept LOONGARCH_CSR_DMWIN3 - LOONGARCH_CSR_DMWIN0 + 1
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AsmCsrWr CsrSel
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CsrSel = CsrSel + 1
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.endr
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ASM_PFX(AsmCsrXChg):
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blt $a0, $zero, XchgSelNumErr
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li.w $t0, LOONGARCH_CSR_EBASE
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bltu $t0, $a0, TlbCsrXchg
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BasicCsrXchg:
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la.pcrel $t0, BasicCsrXchange
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alsl.d $t0, $a0, $t0, 3
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move $a0, $a1
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move $a1, $a2
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jirl $zero, $t0, 0
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TlbCsrXchg:
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li.w $t0, LOONGARCH_CSR_TLBIDX
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bltu $a0, $t0, XchgSelNumErr
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li.w $t0, LOONGARCH_CSR_RVACFG
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bltu $t0, $a0, CfgCsrXchg
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la.pcrel $t0, TlbCsrXchange
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addi.w $t1, $a0, -LOONGARCH_CSR_TLBIDX
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alsl.d $t0, $t1, $t0, 3
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move $a0, $a1
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move $a1, $a2
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jirl $zero, $t0, 0
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CfgCsrXchg:
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li.w $t0, LOONGARCH_CSR_CPUNUM
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bltu $a0, $t0, XchgSelNumErr
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li.w $t0, LOONGARCH_CSR_PRCFG3
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bltu $t0, $a0, KcsCsrXchg
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la.pcrel $t0, CfgCsrXchange
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addi.w $t1, $a0, -LOONGARCH_CSR_CPUNUM
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alsl.d $t0, $t1, $t0, 3
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move $a0, $a1
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move $a1, $a2
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jirl $zero, $t0, 0
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KcsCsrXchg:
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li.w $t0, LOONGARCH_CSR_KS0
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bltu $a0, $t0, XchgSelNumErr
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li.w $t0, LOONGARCH_CSR_KS8
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bltu $t0, $a0, StableTimerCsrXchg
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la.pcrel $t0, KcsCsrXchange
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addi.w $t1, $a0, -LOONGARCH_CSR_KS0
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alsl.d $t0, $t1, $t0, 3
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move $a0, $a1
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move $a1, $a2
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jirl $zero, $t0, 0
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StableTimerCsrXchg:
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li.w $t0, LOONGARCH_CSR_TMID
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bltu $a0, $t0, XchgSelNumErr
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li.w $t0, LOONGARCH_CSR_TINTCLR
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bltu $t0, $a0, TlbRefillCsrXchg
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la.pcrel $t0, StableTimerCsrXchange
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addi.w $t1, $a0, -LOONGARCH_CSR_TMID
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alsl.d $t0, $t1, $t0, 3
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move $a0, $a1
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move $a1, $a2
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jirl $zero, $t0, 0
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TlbRefillCsrXchg:
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li.w $t0, LOONGARCH_CSR_TLBREBASE
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bltu $a0, $t0, XchgSelNumErr
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li.w $t0, LOONGARCH_CSR_TLBREHI
|
||||
bltu $t0, $a0, DirMapCsrXchg
|
||||
la.pcrel $t0, TlbRefillCsrXchange
|
||||
addi.w $t1, $a0, -LOONGARCH_CSR_TLBREBASE
|
||||
alsl.d $t0, $t1, $t0, 3
|
||||
move $a0, $a1
|
||||
move $a1, $a2
|
||||
jirl $zero, $t0, 0
|
||||
|
||||
DirMapCsrXchg:
|
||||
li.w $t0, LOONGARCH_CSR_DMWIN0
|
||||
bltu $a0, $t0, XchgSelNumErr
|
||||
li.w $t0, LOONGARCH_CSR_DMWIN3
|
||||
bltu $t0, $a0, XchgSelNumErr
|
||||
la.pcrel $t0, DirMapCsrXchange
|
||||
addi.w $t1, $a0, -LOONGARCH_CSR_DMWIN0
|
||||
alsl.d $t0, $t1, $t0, 3
|
||||
move $a0, $a1
|
||||
move $a1, $a2
|
||||
jirl $zero, $t0, 0
|
||||
|
||||
XchgSelNumErr:
|
||||
addi.d $a0, $zero, -1
|
||||
jirl $zero, $ra, 0
|
||||
|
||||
BasicCsrXchange:
|
||||
CsrSel = LOONGARCH_CSR_CRMD
|
||||
.rept LOONGARCH_CSR_EBASE - LOONGARCH_CSR_CRMD + 1
|
||||
AsmCsrXChange CsrSel
|
||||
CsrSel = CsrSel + 1
|
||||
.endr
|
||||
|
||||
TlbCsrXchange:
|
||||
CsrSel = LOONGARCH_CSR_TLBIDX
|
||||
.rept LOONGARCH_CSR_RVACFG - LOONGARCH_CSR_TLBIDX + 1
|
||||
AsmCsrXChange CsrSel
|
||||
CsrSel = CsrSel + 1
|
||||
.endr
|
||||
|
||||
CfgCsrXchange:
|
||||
CsrSel = LOONGARCH_CSR_CPUNUM
|
||||
.rept LOONGARCH_CSR_PRCFG3 - LOONGARCH_CSR_CPUNUM + 1
|
||||
AsmCsrXChange CsrSel
|
||||
CsrSel = CsrSel + 1
|
||||
.endr
|
||||
|
||||
KcsCsrXchange:
|
||||
CsrSel = LOONGARCH_CSR_KS0
|
||||
.rept LOONGARCH_CSR_KS8 - LOONGARCH_CSR_KS0 + 1
|
||||
AsmCsrXChange CsrSel
|
||||
CsrSel = CsrSel + 1
|
||||
.endr
|
||||
|
||||
StableTimerCsrXchange:
|
||||
CsrSel = LOONGARCH_CSR_TMID
|
||||
.rept LOONGARCH_CSR_TINTCLR - LOONGARCH_CSR_TMID + 1
|
||||
AsmCsrXChange CsrSel
|
||||
CsrSel = CsrSel + 1
|
||||
.endr
|
||||
|
||||
TlbRefillCsrXchange:
|
||||
CsrSel = LOONGARCH_CSR_TLBREBASE
|
||||
.rept LOONGARCH_CSR_TLBREHI - LOONGARCH_CSR_TLBREBASE + 1
|
||||
AsmCsrXChange CsrSel
|
||||
CsrSel = CsrSel + 1
|
||||
.endr
|
||||
|
||||
DirMapCsrXchange:
|
||||
CsrSel = LOONGARCH_CSR_DMWIN0
|
||||
.rept LOONGARCH_CSR_DMWIN3 - LOONGARCH_CSR_DMWIN0 + 1
|
||||
AsmCsrXChange CsrSel
|
||||
CsrSel = CsrSel + 1
|
||||
.endr
|
||||
.end
|
||||
|
|
@ -0,0 +1,81 @@
|
|||
/** @file
|
||||
LoongArch CSR operation functions.
|
||||
|
||||
Copyright (c) 2024, Loongson Technology Corporation Limited. All rights reserved.<BR>
|
||||
|
||||
SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
**/
|
||||
|
||||
UINTN
|
||||
AsmCsrRead (
|
||||
IN UINT16 Select
|
||||
);
|
||||
|
||||
UINTN
|
||||
AsmCsrWrite (
|
||||
IN UINT16 Select,
|
||||
IN UINTN Value
|
||||
);
|
||||
|
||||
UINTN
|
||||
AsmCsrXChg (
|
||||
IN UINT16 Select,
|
||||
IN UINTN Value,
|
||||
IN UINTN Mask
|
||||
);
|
||||
|
||||
/**
|
||||
CSR read operation.
|
||||
|
||||
@param[in] Select CSR read instruction select values.
|
||||
|
||||
@return The return value of csrrd instruction, return -1 means Select is out of support.
|
||||
**/
|
||||
UINTN
|
||||
EFIAPI
|
||||
CsrRead (
|
||||
IN UINT16 Select
|
||||
)
|
||||
{
|
||||
return AsmCsrRead (Select);
|
||||
}
|
||||
|
||||
/**
|
||||
CSR write operation.
|
||||
|
||||
@param[in] Select CSR write instruction select values.
|
||||
@param[in, out] Value The csrwr will write the value.
|
||||
|
||||
@return The return value of csrwr instruction, that is, store the old value of
|
||||
the register, return -1 means Select is out of support.
|
||||
**/
|
||||
UINTN
|
||||
EFIAPI
|
||||
CsrWrite (
|
||||
IN UINT16 Select,
|
||||
IN OUT UINTN Value
|
||||
)
|
||||
{
|
||||
return AsmCsrWrite (Select, Value);
|
||||
}
|
||||
|
||||
/**
|
||||
CSR exchange operation.
|
||||
|
||||
@param[in] Select CSR exchange instruction select values.
|
||||
@param[in, out] Value The csrxchg will write the value.
|
||||
@param[in] Mask The csrxchg mask value.
|
||||
|
||||
@return The return value of csrxchg instruction, that is, store the old value of
|
||||
the register, return -1 means Select is out of support.
|
||||
**/
|
||||
UINTN
|
||||
EFIAPI
|
||||
CsrXChg (
|
||||
IN UINT16 Select,
|
||||
IN OUT UINTN Value,
|
||||
IN UINTN Mask
|
||||
)
|
||||
{
|
||||
return AsmCsrXChg (Select, Value, Mask);
|
||||
}
|
||||
Loading…
Reference in New Issue