tyler.durden
/
audk
mirror of https://github.com/acidanthera/audk.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

MdeModulePkg/SdMmcPciHcDxe: Fix SdMmcHcReset to set only necesery bits 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1185

SdMmcHcReset used to set all bits of Software Reset Register to 1
including reserved ones, which on some controllers may result in
timeout.

Now only first bit is set, which means "Software Reset for All".

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
This commit is contained in:
Tomasz Michalec 2018-09-18 16:59:06 +08:00 committed by Hao Wu
parent 9062ab4787
commit 064d301fb0
1 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
View File

@ -454,11 +454,11 @@ SdMmcHcReset (
}
PciIo = Private->PciIo;
SwReset = 0xFF;
Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_SW_RST, FALSE, sizeof (SwReset), &SwReset);
SwReset = BIT0;
Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_SW_RST, sizeof (SwReset), &SwReset);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "SdMmcHcReset: write full 1 fails: %r\n", Status));
DEBUG ((DEBUG_ERROR, "SdMmcHcReset: write SW Reset for All fails: %r\n", Status));
return Status;
}
@ -467,7 +467,7 @@ SdMmcHcReset (
Slot,
SD_MMC_HC_SW_RST,
sizeof (SwReset),
0xFF,
BIT0,
0x00,
SD_MMC_HC_GENERIC_TIMEOUT
);