mirror of https://github.com/acidanthera/audk.git
MdePkg: Add RPMB related commands and DCB definition for NVMe
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4303 Add RPMB(Replay Protected Memory Block) access commands, result and DCB(Device Configuration Block) definition for NVMe according to the NVMe spec 2.0. Cc: Hao Wu <hao.a.wu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Weipu Zhu <weipu.zhu@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Acked-by: Michael D Kinney <michael.d.kinney@intel.com>
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@ -2,12 +2,13 @@
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Definitions based on NVMe spec. version 1.1.
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Definitions based on NVMe spec. version 1.1.
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(C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
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(C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
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Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2017 - 2023, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@par Specification Reference:
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@par Specification Reference:
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NVMe Specification 1.1
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NVMe Specification 1.1
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NVMe Specification 1.4
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NVMe Specification 1.4
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NVMe Specification 2.0
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**/
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**/
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@ -502,6 +503,49 @@ typedef struct {
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// UINT8 *Data; /* Data to be written or read by signed access where M = 512 * Sector Count. */
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// UINT8 *Data; /* Data to be written or read by signed access where M = 512 * Sector Count. */
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} NVME_RPMB_DATA_FRAME;
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} NVME_RPMB_DATA_FRAME;
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//
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// RPMB Device Configuration Block Data Structure.
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// (ref. NVMe Base spec. v2.0 Figure 460).
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//
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typedef struct {
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UINT8 BPPEnable; /* Boot Partition Protection Enabled */
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UINT8 BPLock; /* Boot Partition Lock */
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UINT8 NameSpaceWrP; /* Namespace Write Protection */
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UINT8 Rsvd1[509]; /* Reserved as of Nvm Express 2.0 Spec */
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} NVME_RPMB_DCB;
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//
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// RPMB Request and Response Message Types.
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// (ref. NVMe Base spec. v2.0 Figure 461).
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//
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#define NVME_RPMB_AUTHKEY_PROGRAM 0x0001
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#define NVME_RPMB_COUNTER_READ 0x0002
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#define NVME_RPMB_AUTHDATA_WRITE 0x0003
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#define NVME_RPMB_AUTHDATA_READ 0x0004
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#define NVME_RPMB_RESULT_READ 0x0005
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#define NVME_RPMB_DCB_WRITE 0x0006
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#define NVME_RPMB_DCB_READ 0x0007
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#define NVME_RPMB_AUTHKEY_PROGRAM_RESPONSE 0x0100
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#define NVME_RPMB_COUNTER_READ_RESPONSE 0x0200
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#define NVME_RPMB_AUTHDATA_WRITE_RESPONSE 0x0300
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#define NVME_RPMB_AUTHDATA_READ_RESPONSE 0x0400
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#define NVME_RPMB_DCB_WRITE_RESPONSE 0x0600
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#define NVME_RPMB_DCB_READ_RESPONSE 0x0700
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//
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// RPMB Operation Result.
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// (ref. NVMe Base spec. v2.0 Figure 462).
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//
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#define NVME_RPMB_RESULT_SUCCESS 0x00
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#define NVME_RPMB_RESULT_GENERAL_FAILURE 0x01
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#define NVME_RPMB_RESULT_AHTHENTICATION_FAILURE 0x02
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#define NVME_RPMB_RESULT_COUNTER_FAILURE 0x03
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#define NVME_RPMB_RESULT_ADDRESS_FAILURE 0x04
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#define NVME_RPMB_RESULT_WRITE_FAILURE 0x05
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#define NVME_RPMB_RESULT_READ_FAILURE 0x06
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#define NVME_RPMB_RESULT_AUTHKEY_NOT_PROGRAMMED 0x07
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#define NVME_RPMB_RESULT_INVALID_DCB 0x08
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//
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//
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// NvmExpress Admin Identify Cmd
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// NvmExpress Admin Identify Cmd
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//
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//
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