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Vlv2TbltDevicePkg/PlatformDxe: Remove the unused variables 

Fix the following errors from gcc:

Vlv2TbltDevicePkg/PlatformDxe/Platform.c: In function ?InitPciDevPME?:
Vlv2TbltDevicePkg/PlatformDxe/Platform.c:516:26: error: variable ?Status? set but not used [-Werror=unused-but-set-variable]

Vlv2TbltDevicePkg/PlatformDxe/Platform.c: In function ?InitThermalZone?:
Vlv2TbltDevicePkg/PlatformDxe/Platform.c:575:26: error: variable ?Status? set but not used [-Werror=unused-but-set-variable]

Vlv2TbltDevicePkg/PlatformDxe/IchRegTable.c: In function ?InitializeSubsystemIds?:
Vlv2TbltDevicePkg/PlatformDxe/IchRegTable.c:111:10: error: variable ?SubsystemAudioVidDid? set but not used [-Werror=unused-but-set-variable]

Vlv2TbltDevicePkg/PlatformDxe/PciDevice.c: In function ?InitBadBars?:
Vlv2TbltDevicePkg/PlatformDxe/PciDevice.c:115:40: error: variable ?PciIoDevice? set but not used [-Werror=unused-but-set-variable]
Vlv2TbltDevicePkg/PlatformDxe/PciDevice.c:114:39: error: variable ?Status? set but not used [-Werror=unused-but-set-variable]

Vlv2TbltDevicePkg/PlatformDxe/PciDevice.c: In function ?ProgramPciLatency?:
Vlv2TbltDevicePkg/PlatformDxe/PciDevice.c:320:39: error: variable ?Status? set but not used [-Werror=unused-but-set-variable]

Cc: David Wei <david.wei@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gary Lin <glin@suse.com>
Reviewed-by: David Wei <david.wei@intel.com>
This commit is contained in:
Gary Lin 2016-07-29 11:25:34 +08:00 committed by david wei
parent 5c3bd3500f
commit 076d0d64aa
3 changed files with 122 additions and 132 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Vlv2TbltDevicePkg/PlatformDxe/IchRegTable.c
View File

@ -99,10 +99,8 @@ InitializeSubsystemIds (
EFI_REG_TABLE *RegTablePtr; EFI_REG_TABLE *RegTablePtr;
UINT32 SubsystemVidDid; UINT32 SubsystemVidDid;
UINT32 SubsystemAudioVidDid;
SubsystemVidDid = mPlatformInfo.SsidSvid; SubsystemVidDid = mPlatformInfo.SsidSvid;
SubsystemAudioVidDid = mPlatformInfo.SsidSvid;
RegTablePtr = mSubsystemIdRegs; RegTablePtr = mSubsystemIdRegs;

36
Vlv2TbltDevicePkg/PlatformDxe/PciDevice.c
View File

@ -102,8 +102,6 @@ InitBadBars(
) )
{ {
EFI_STATUS Status;
PCI_IO_DEVICE *PciIoDevice;
UINT64 BaseAddress = 0; UINT64 BaseAddress = 0;
UINT64 TempBaseAddress = 0; UINT64 TempBaseAddress = 0;
UINT8 RevId = 0; UINT8 RevId = 0;
@ -112,8 +110,6 @@ InitBadBars(
UINT64 MemSize; UINT64 MemSize;
UINTN MemSizeBits; UINTN MemSizeBits;
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (PciIo);
switch ( VendorId) { switch ( VendorId) {
case ATI_VENDOR_ID: case ATI_VENDOR_ID:
// //
@ -124,7 +120,7 @@ InitBadBars(
// //
// Get original BAR address // Get original BAR address
// //
Status = PciIo->Pci.Read ( PciIo->Pci.Read (
PciIo, PciIo,
EfiPciIoWidthUint32, EfiPciIoWidthUint32,
Bar, Bar,
@ -135,14 +131,14 @@ InitBadBars(
// Find BAR size // Find BAR size
// //
TempBaseAddress = 0xffffffff; TempBaseAddress = 0xffffffff;
Status = PciIo->Pci.Write ( PciIo->Pci.Write (
PciIo, PciIo,
EfiPciIoWidthUint32, EfiPciIoWidthUint32,
Bar, Bar,
1, 1,
(VOID *) &TempBaseAddress (VOID *) &TempBaseAddress
); );
Status = PciIo->Pci.Read ( PciIo->Pci.Read (
PciIo, PciIo,
EfiPciIoWidthUint32, EfiPciIoWidthUint32,
Bar, Bar,
@ -159,7 +155,7 @@ InitBadBars(
// //
// Free up allocated memory memory and re-allocate with increased size. // Free up allocated memory memory and re-allocate with increased size.
// //
Status = gDS->FreeMemorySpace ( gDS->FreeMemorySpace (
BaseAddress, BaseAddress,
MemSize MemSize
); );
@ -169,7 +165,7 @@ InitBadBars(
MemSize = 0x8000000; MemSize = 0x8000000;
MemSizeBits = 28; MemSizeBits = 28;
Status = gDS->AllocateMemorySpace ( gDS->AllocateMemorySpace (
EfiGcdAllocateAnySearchBottomUp, EfiGcdAllocateAnySearchBottomUp,
EfiGcdMemoryTypeMemoryMappedIo, EfiGcdMemoryTypeMemoryMappedIo,
MemSizeBits, // Alignment MemSizeBits, // Alignment
@ -178,7 +174,7 @@ InitBadBars(
mImageHandle, mImageHandle,
NULL NULL
); );
Status = PciIo->Pci.Write ( PciIo->Pci.Write (
PciIo, PciIo,
EfiPciIoWidthUint32, EfiPciIoWidthUint32,
Bar, Bar,
@ -195,7 +191,7 @@ InitBadBars(
// //
for (Bar = 0x10; Bar < 0x28; Bar+= 4) { for (Bar = 0x10; Bar < 0x28; Bar+= 4) {
Status = PciIo->Pci.Read ( PciIo->Pci.Read (
PciIo, PciIo,
EfiPciIoWidthUint32, EfiPciIoWidthUint32,
Bar, Bar,
@ -204,7 +200,7 @@ InitBadBars(
); );
if (BaseAddress && 0x01) { if (BaseAddress && 0x01) {
TempBaseAddress = 0xffffffff; TempBaseAddress = 0xffffffff;
Status = PciIo->Pci.Write ( PciIo->Pci.Write (
PciIo, PciIo,
EfiPciIoWidthUint32, EfiPciIoWidthUint32,
Bar, Bar,
@ -218,12 +214,12 @@ InitBadBars(
IoSize = IoSize << 1; IoSize = IoSize << 1;
} }
if (IoSize < MIN_NCR_IO_SIZE) { if (IoSize < MIN_NCR_IO_SIZE) {
Status = gDS->FreeIoSpace ( gDS->FreeIoSpace (
BaseAddress, BaseAddress,
IoSize IoSize
); );
Status = gDS->AllocateIoSpace ( gDS->AllocateIoSpace (
EfiGcdAllocateAnySearchTopDown, EfiGcdAllocateAnySearchTopDown,
EfiGcdIoTypeIo, EfiGcdIoTypeIo,
NCR_GRAN, // Alignment NCR_GRAN, // Alignment
@ -233,7 +229,7 @@ InitBadBars(
NULL NULL
); );
TempBaseAddress = BaseAddress + 1; TempBaseAddress = BaseAddress + 1;
Status = PciIo->Pci.Write ( PciIo->Pci.Write (
PciIo, PciIo,
EfiPciIoWidthUint32, EfiPciIoWidthUint32,
Bar, Bar,
@ -255,7 +251,7 @@ InitBadBars(
// Controller. // Controller.
// All Tekoa A2 or earlier step chips for now. // All Tekoa A2 or earlier step chips for now.
// //
Status = PciIo->Pci.Read ( PciIo->Pci.Read (
PciIo, PciIo,
EfiPciIoWidthUint8, EfiPciIoWidthUint8,
PCI_REVISION_ID_OFFSET, PCI_REVISION_ID_OFFSET,
@ -269,7 +265,7 @@ InitBadBars(
// Bars don't worry aboyut freeing up thge allocs. // Bars don't worry aboyut freeing up thge allocs.
// //
TempBaseAddress = 0x0; TempBaseAddress = 0x0;
Status = PciIo->Pci.Write ( PciIo->Pci.Write (
PciIo, PciIo,
EfiPciIoWidthUint32, EfiPciIoWidthUint32,
Bar, Bar,
@ -286,7 +282,7 @@ InitBadBars(
//since Tekoa does not fully support IDE Bus Mastering //since Tekoa does not fully support IDE Bus Mastering
// //
TempBaseAddress = 0x0; TempBaseAddress = 0x0;
Status = PciIo->Pci.Write ( PciIo->Pci.Write (
PciIo, PciIo,
EfiPciIoWidthUint32, EfiPciIoWidthUint32,
0x20, 0x20,
@ -308,13 +304,11 @@ ProgramPciLatency(
IN EFI_PCI_IO_PROTOCOL *PciIo IN EFI_PCI_IO_PROTOCOL *PciIo
) )
{ {
EFI_STATUS Status;
// //
// Program Master Latency Timer // Program Master Latency Timer
// //
if (mSystemConfiguration.PciLatency != 0) { if (mSystemConfiguration.PciLatency != 0) {
Status = PciIo->Pci.Write ( PciIo->Pci.Write (
PciIo, PciIo,
EfiPciIoWidthUint8, EfiPciIoWidthUint8,
PCI_LATENCY_TIMER_OFFSET, PCI_LATENCY_TIMER_OFFSET,

8
Vlv2TbltDevicePkg/PlatformDxe/Platform.c
View File

@ -513,10 +513,9 @@ InitPciDevPME (
) )
{ {
UINTN VarSize; UINTN VarSize;
EFI_STATUS Status;
VarSize = sizeof(SYSTEM_CONFIGURATION); VarSize = sizeof(SYSTEM_CONFIGURATION);
Status = gRT->GetVariable( gRT->GetVariable(
NORMAL_SETUP_NAME, NORMAL_SETUP_NAME,
&gEfiNormalSetupGuid, &gEfiNormalSetupGuid,
NULL, NULL,
@ -572,17 +571,16 @@ InitThermalZone (
) )
{ {
UINTN VarSize; UINTN VarSize;
EFI_STATUS Status;
EFI_GLOBAL_NVS_AREA_PROTOCOL *GlobalNvsArea; EFI_GLOBAL_NVS_AREA_PROTOCOL *GlobalNvsArea;
VarSize = sizeof(SYSTEM_CONFIGURATION); VarSize = sizeof(SYSTEM_CONFIGURATION);
Status = gRT->GetVariable( gRT->GetVariable(
NORMAL_SETUP_NAME, NORMAL_SETUP_NAME,
&gEfiNormalSetupGuid, &gEfiNormalSetupGuid,
NULL, NULL,
&VarSize, &VarSize,
&mSystemConfiguration &mSystemConfiguration
); );
Status = gBS->LocateProtocol ( gBS->LocateProtocol (
&gEfiGlobalNvsAreaProtocolGuid, &gEfiGlobalNvsAreaProtocolGuid,
NULL, NULL,
(void **)&GlobalNvsArea (void **)&GlobalNvsArea