mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg/Cpuid: Dump leaf 1FH information correctly
Leaf 1FH is very similar to leaf 0BH. Both return the CPU topology information. Leaf 0BH returns 3-level (Package/Core/Thread) CPU topology info. Leaf 1FH returns 6-level (Package/Die/Tile/Module/Core/Thread) CPU topology info. The logic to enumerate the topology info is the same. But today's logic to handle 1FH is completely wrong. The patch combines them together to fix the 1FH issue. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Zhiqiang Qin <zhiqiang.qin@intel.com>
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@ -717,7 +717,7 @@ CpuidArchitecturalPerformanceMonitoring (
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**/
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VOID
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CpuidExtendedTopology (
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VOID
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UINT32 LeafFunction
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)
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{
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CPUID_EXTENDED_TOPOLOGY_EAX Eax;
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@ -726,27 +726,34 @@ CpuidExtendedTopology (
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UINT32 Edx;
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UINT32 LevelNumber;
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if (CPUID_EXTENDED_TOPOLOGY > gMaximumBasicFunction) {
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if (LeafFunction > gMaximumBasicFunction) {
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return;
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}
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if ((LeafFunction != CPUID_EXTENDED_TOPOLOGY) && (LeafFunction != CPUID_V2_EXTENDED_TOPOLOGY)) {
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return;
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}
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LevelNumber = 0;
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do {
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for (LevelNumber = 0; ; LevelNumber++) {
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AsmCpuidEx (
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CPUID_EXTENDED_TOPOLOGY, LevelNumber,
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LeafFunction, LevelNumber,
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&Eax.Uint32, &Ebx.Uint32, &Ecx.Uint32, &Edx
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);
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if (Eax.Bits.ApicIdShift != 0) {
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Print (L"CPUID_EXTENDED_TOPOLOGY (Leaf %08x, Sub-Leaf %08x)\n", CPUID_EXTENDED_TOPOLOGY, LevelNumber);
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Print (L" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n", Eax.Uint32, Ebx.Uint32, Ecx.Uint32, Edx);
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PRINT_BIT_FIELD (Eax, ApicIdShift);
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PRINT_BIT_FIELD (Ebx, LogicalProcessors);
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PRINT_BIT_FIELD (Ecx, LevelNumber);
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PRINT_BIT_FIELD (Ecx, LevelType);
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PRINT_VALUE (Edx, x2APIC_ID);
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if (Ecx.Bits.LevelType == CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_INVALID) {
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break;
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}
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LevelNumber++;
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} while (Eax.Bits.ApicIdShift != 0);
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Print (
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L"%a (Leaf %08x, Sub-Leaf %08x)\n",
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LeafFunction == CPUID_EXTENDED_TOPOLOGY ? "CPUID_EXTENDED_TOPOLOGY" : "CPUID_V2_EXTENDED_TOPOLOGY",
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LeafFunction, LevelNumber
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);
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Print (L" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n", Eax.Uint32, Ebx.Uint32, Ecx.Uint32, Edx);
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PRINT_BIT_FIELD (Eax, ApicIdShift);
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PRINT_BIT_FIELD (Ebx, LogicalProcessors);
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PRINT_BIT_FIELD (Ecx, LevelNumber);
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PRINT_BIT_FIELD (Ecx, LevelType);
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PRINT_VALUE (Edx, x2APIC_ID);
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}
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}
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/**
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@ -1385,39 +1392,6 @@ CpuidDeterministicAddressTranslationParameters (
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PRINT_BIT_FIELD (Edx, MaximumNum);
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}
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/**
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Display CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION main leaf and sub-leafs.
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**/
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VOID
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CpuidV2ExtendedTopologyEnumeration (
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VOID
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)
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{
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CPUID_EXTENDED_TOPOLOGY_EAX Eax;
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CPUID_EXTENDED_TOPOLOGY_EBX Ebx;
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CPUID_EXTENDED_TOPOLOGY_ECX Ecx;
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UINT32 Edx;
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if (CPUID_V2_EXTENDED_TOPOLOGY > gMaximumBasicFunction) {
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return;
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}
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AsmCpuidEx (
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CPUID_V2_EXTENDED_TOPOLOGY,
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0,
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&Eax.Uint32, &Ebx.Uint32, &Ecx.Uint32, &Edx
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);
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Print (L"CPUID_V2_EXTENDED_TOPOLOGY (Leaf %08x, Sub-Leaf %08x)\n", CPUID_V2_EXTENDED_TOPOLOGY, 0);
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Print (L" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n", Eax.Uint32, Ebx.Uint32, Ecx.Uint32, Edx);
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PRINT_BIT_FIELD (Eax, ApicIdShift);
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PRINT_BIT_FIELD (Ebx, LogicalProcessors);
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PRINT_BIT_FIELD (Ecx, LevelNumber);
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PRINT_BIT_FIELD (Ecx, LevelType);
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PRINT_VALUE (Edx, x2APICID);
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}
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/**
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Display CPUID_EXTENDED_FUNCTION leaf.
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@ -1619,7 +1593,7 @@ UefiMain (
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CpuidStructuredExtendedFeatureFlags ();
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CpuidDirectCacheAccessInfo();
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CpuidArchitecturalPerformanceMonitoring ();
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CpuidExtendedTopology ();
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CpuidExtendedTopology (CPUID_EXTENDED_TOPOLOGY);
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CpuidExtendedStateMainLeaf ();
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CpuidIntelRdtMonitoringEnumerationSubLeaf ();
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CpuidIntelRdtMonitoringL3CacheCapabilitySubLeaf ();
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@ -1630,7 +1604,7 @@ UefiMain (
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CpuidProcessorFrequency ();
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CpuidSocVendor ();
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CpuidDeterministicAddressTranslationParameters ();
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CpuidV2ExtendedTopologyEnumeration ();
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CpuidExtendedTopology (CPUID_V2_EXTENDED_TOPOLOGY);
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CpuidExtendedFunction ();
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CpuidExtendedCpuSig ();
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CpuidProcessorBrandString ();
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