From 07d3ba07709d8aa417f5f887b84ec78a908c6d2a Mon Sep 17 00:00:00 2001 From: Laszlo Ersek Date: Mon, 9 May 2016 20:05:18 +0200 Subject: [PATCH] OvmfPkg: add and use industry standard macro PIIX4_PMBA_MASK We already have the identical purpose (but different value) macro for ICH9, namely ICH9_PMBASE_MASK in "OvmfPkg/Include/IndustryStandard/Q35MchIch9.h". Also, stop bit-negating signed integer constants. Cc: Gabriel Somlo Cc: Jordan Justen Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1333238 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek Reviewed-by: Jordan Justen Tested-by: Gabriel Somlo --- OvmfPkg/Include/IndustryStandard/I440FxPiix4.h | 2 ++ OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c | 2 +- OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c | 2 +- OvmfPkg/PlatformPei/Platform.c | 2 +- 4 files changed, 5 insertions(+), 3 deletions(-) diff --git a/OvmfPkg/Include/IndustryStandard/I440FxPiix4.h b/OvmfPkg/Include/IndustryStandard/I440FxPiix4.h index 8cbd685ab5..baa4c063f1 100644 --- a/OvmfPkg/Include/IndustryStandard/I440FxPiix4.h +++ b/OvmfPkg/Include/IndustryStandard/I440FxPiix4.h @@ -33,6 +33,8 @@ #define POWER_MGMT_REGISTER_PIIX4(Offset) PCI_LIB_ADDRESS (0, 1, 3, (Offset)) #define PIIX4_PMBA 0x40 +#define PIIX4_PMBA_MASK (BIT15 | BIT14 | BIT13 | BIT12 | BIT11 | \ + BIT10 | BIT9 | BIT8 | BIT7 | BIT6) #define PIIX4_PMREGMISC 0x80 #define PIIX4_PMREGMISC_PMIOSE BIT0 diff --git a/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c b/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c index 109b267cf4..652545d864 100644 --- a/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c +++ b/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c @@ -70,7 +70,7 @@ AcpiTimerLibConstructor ( // If the Power Management Base Address is not programmed, // then program it now. // - PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PIIX4_PMBA_VALUE); + PciAndThenOr32 (Pmba, ~(UINT32)PIIX4_PMBA_MASK, PIIX4_PMBA_VALUE); // // Enable PMBA I/O port decodes diff --git a/OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c b/OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c index c46055a09b..735dfd2e4b 100644 --- a/OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c +++ b/OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c @@ -68,7 +68,7 @@ AcpiTimerLibConstructor ( // If the Power Management Base Address is not programmed, // then program it now. // - PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PIIX4_PMBA_VALUE); + PciAndThenOr32 (Pmba, ~(UINT32)PIIX4_PMBA_MASK, PIIX4_PMBA_VALUE); // // Enable PMBA I/O port decodes diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c index 2348b56f0b..65b3df401a 100644 --- a/OvmfPkg/PlatformPei/Platform.c +++ b/OvmfPkg/PlatformPei/Platform.c @@ -412,7 +412,7 @@ MiscInitialization ( // The PEI phase should be exited with fully accessibe ACPI PM IO space: // 1. set PMBA // - PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PIIX4_PMBA_VALUE); + PciAndThenOr32 (Pmba, ~(UINT32)PIIX4_PMBA_MASK, PIIX4_PMBA_VALUE); // // 2. set PCICMD/IOSE